LM3S5652 Luminary Micro, Inc, LM3S5652 Datasheet - Page 444

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LM3S5652

Manufacturer Part Number
LM3S5652
Description
Lm3s5652 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet

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Reset
Reset
Type
Type
Synchronous Serial Interface (SSI)
SSI DMA Control (SSIDMACTL)
SSI0 base: 0x4000.8000
Offset 0x024
Type R/W, reset 0x0000.0000
444
Bit/Field
31:2
RO
RO
1
0
31
15
0
0
RO
RO
Register 10: SSI DMA Control (SSIDMACTL), offset 0x024
The SSIDMACTL register is the DMA control register.
30
14
0
0
RO
RO
RXDMAE
29
13
TXDMAE
reserved
0
0
Name
RO
RO
28
12
0
0
RO
RO
27
11
0
0
Type
R/W
R/W
RO
RO
RO
26
10
0
0
RO
RO
Reset
25
0x00
0
9
0
reserved
0
0
Preliminary
RO
RO
24
0
8
0
reserved
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Transmit DMA Enable
If this bit is set to 1, DMA for the transmit FIFO is enabled.
Receive DMA Enable
If this bit is set to 1, DMA for the receive FIFO is enabled.
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
RO
RO
20
0
4
0
RO
RO
19
0
3
0
RO
RO
18
0
2
0
TXDMAE
R/W
RO
17
0
1
0
June 02, 2008
RXDMAE
R/W
RO
16
0
0
0

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