LM3S5652 Luminary Micro, Inc, LM3S5652 Datasheet - Page 636
LM3S5652
Manufacturer Part Number
LM3S5652
Description
Lm3s5652 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S5652.pdf
(703 pages)
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LM3S5652-IQR50-A0
Manufacturer:
Texas Instruments
Quantity:
10 000
Company:
Part Number:
LM3S5652-IQR50-A0T
Manufacturer:
Texas Instruments
Quantity:
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Signal Tables
636
Pin Number
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
USB0EPEN
USB0PFLT
Pin Name
SSI0Clk
SSI0Fss
I2C0SDA
SSI0Rx
SSI0Tx
VDD25
CCP4
U0Rx
U0Tx
CCP1
CCP3
OSC0
OSC1
WAKE
PC5
PC6
PC7
PA0
PA1
PA2
PA3
PA4
PA5
GND
PA6
PA7
PB3
VDD
GND
HIB
Preliminary
Pin Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
-
-
-
-
I
I
I
I
I
Buffer Type
Analog
Analog
Power
Power
Power
Power
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
OD
OD
-
Description
GPIO port C bit 5
Used in Host mode to control an external
power source to supply power to the USB bus.
GPIO port C bit 6
Used in Host mode by an external power
source to indicate an error state by that power
source.
GPIO port C bit 7
Capture/Compare/PWM 4
GPIO port A bit 0
UART module 0 receive. When in IrDA mode,
this signal has IrDA modulation.
GPIO port A bit 1
UART module 0 transmit. When in IrDA mode,
this signal has IrDA modulation.
GPIO port A bit 2
SSI module 0 clock
GPIO port A bit 3
SSI module 0 frame
GPIO port A bit 4
SSI module 0 receive
GPIO port A bit 5
SSI module 0 transmit
Positive supply for most of the logic function,
including the processor core and most
peripherals.
Ground reference for logic and I/O pins.
GPIO port A bit 6
Capture/Compare/PWM 1
GPIO port A bit 7
Capture/Compare/PWM 3
GPIO port B bit 3
I2C module 0 data
Positive supply for I/O and some logic.
Ground reference for logic and I/O pins.
Main oscillator crystal input or an external
clock reference input.
Main oscillator crystal output.
An external input that brings the processor out
of hibernate mode when asserted.
An output that indicates the processor is in
hibernate mode.
June 02, 2008
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