CLA70000 Zarlink Semiconductor, CLA70000 Datasheet - Page 7

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CLA70000

Manufacturer Part Number
CLA70000
Description
High Density CMOS Gate Arrays
Manufacturer
Zarlink Semiconductor
Datasheet
ADT32
Subtractor Blocks
ADSU4
ADSU8
ADSU16
ADSU24
ADSU32
Shifters Arithmetic Right
(Padded with MSB)
SHA4
SHA8
SHA16
SHA24
SHA32
Shifters Barrel Right
(Padded with LSB Data Exiting Shifter)
SHB4
SHB8
SHB16
SHB24
SHB32
Shifters Logic Right/Left
(Padded with Zero's)
SHL4
SHL8
SHL16
SHL24
SHL32
Logic Units (8 Function)
FGLO4
FGLO8
FGLO16
FGLO24
FGLO32
Arithmetic Units (8 Function)
FGAR4
FGAR8
FGAR16
FGAR24
FGAR32
CLA70000 DSP Macrocell Library
Multiplers and Associated Cells
BMA8X8
BMA16X16
BMA24X24
32 bit adder
4 bit subtractor add-on
8 bit subtractor add-on
16 bit subtractor add-on
24 bit subtractor add-on
32 bit subtractor add-on
4 stage arithmetic right shifter
8 stage arithmetic right shifter
16 stage arithmetic right shifter
24 stage arithmetic right shifter
31 stage arithmetic right shifter
4 stage barrel right shifter
8 stage barrel right shifter
16 stage barrel right shifter
24 stage barrel right shifter
31 stage barrel right shifter
4 stage logic right shifter
8 stage logic right shifter
16 stage logic right shifter
24 stage logic right shifter
31 stage logic right shifter
4 logic bit unit
8 logic bit unit
16 logic bit unit
24 logic bit unit
32 logic bit unit
4 bit logic unit
8 bit logic unit
16 bit logic unit
24 bit logic unit
32 bit logic unit
Mixed mode multiplier (8 x 8 bits)
Mixed mode multiplier (16 x 16 bits)
Mixed mode multiplier (32 x 32 bits)
BMB16X12
BMC24X24
BTHE1
BTHD1
BTHD2
to the standard TTL and CMOS logic families. The user is
warned, however, that the logic functions may differ slightly
and is therefore recommended to refer to the design manual
rather than assume an exact functional copy. The PDS
simulator uses the constituent microcell models for circuit
analysis.
and are placed and routed to give optimum use of chip area.
MACRO
Adders
ADA4
ADG4
Counters
CNA4
CNB4
CNC4
CND4
CND4A
CNE4
CNF4
CNG4
Decoders
DRA3T8
DRA4T16
DRA4T16A
DRB3T8
DRB3T8
DRD2T4
DRF4T10
DRG4T10
DRH4T10
DRI10
DRJ7
DRK7
DRL7
Many of the macro functions perform similar functions
The macrocells are constructed from basic microcells
Single pipeline multiplier (16 x 12 bits)
Mixed mode multiplier (24 x 24 bits)
Booth encoder
Non-Inverting Booth decoder
Inverting Booth decoder
4 bit binary full adders with fast carry
Look ahead carry generator
BCD counter/4 bit latch decoder/driver
4 bit counter latch
4 bit synchronous counter
4 bit binary up/down Synchronous counter
4 bit binary up/down counter with reset
4 bit decade counter
4 bit binary synchronous counter
4 bit binary counter
3 line to 8 line decoder/demultiplexer
4 line to 16 line decoder/demultiplexer
4 line to 16 line decoder/demultiplexer
no enable
3 line to 8 line decoder/demultiplexer
with address registers
3 line to 8 line decoder/demultiplexer
with address latches
2 line to line decoder
4 line to 10 line BCD decoder
4 line to 10 line excess 3 to
decimal decoder
4 line to 10 line excess gray to
decimal decoder decoder
BCD to decimal decoder/driver
BCD to 7 segment decoder/driver
BCD to 7 segment decoder/driver
BCD to 7 segment decoder/driver
FUNCTION
CLA70000 Series
7

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