LTC1159 Linear Technology, LTC1159 Datasheet - Page 6

• Manufacturer Part Number: LTC1159
• Description: High Efficiency Synchronous Step-Down Switching Regulators
• Manufacturer: Linear Technology

OPERATIO
FU CTIO AL DIAGRA
LTC1159/LTC1159-3.3/LTC1159-5
When the voltage on C
parator T trips, setting the flip-flop. This causes the N-gate
output to go low (turning off the N-channel MOSFET) and
the P-gate output to also go low (turning the P-channel
MOSFET back on). The cycle then repeats. As the load
current increases, the output voltage decreases slightly.
This causes the output of the gain stage to increase the
current comparator threshold, thus tracking the load
current.
The sequence of events for Burst Mode operation is very
similar to continuous operation with the cycle interrupted
by the voltage comparator. When the output voltage is at or
above the desired regulated value, the P-channel MOSFET
is held off by comparator V and the timing capacitor
continues to discharge below V
capacitor discharges past V
trips, causing the internal SLEEP line to go low and the
N-channel MOSFET to turn off.
6
U
EXTV
SHDN2
V
CC
IN
U
SLEEP
LOW DROP SWITCH
4.5V REGULATOR
LOW DROPOUT
S
U
+
–
(Refer to Functional Diagram)
T
V
has discharged past V
TH2
TH2
C
T
, voltage comparator S
TH1
CAP
V
CC
V
W
TH1
. When the timing
550k
–
CONTROL
Q
+
OFF-TIME
Internal divider broken at V
T
R
S
TH1
, com-
SENSE
–
The circuit now enters sleep mode with both power
MOSFETs turned off. In sleep mode, much of the cir-
cuitry is turned off, dropping the supply current from
several milliamps (with the MOSFETs switching) to
300 A. When the output capacitor has discharged by
the amount of hysteresis in comparator V, the P-channel
MOSFET is again turned on and this process repeats. To
avoid the operation of the current loop interfering with
Burst Mode operation, a built-in offset is incorporated in
the gain stage.
To prevent both the external MOSFETs from being turned
on at the same time, feedback is incorporated to sense the
state of the driver output pins. Before the N-gate output can
go high, the P-drive output must also be high. Likewise, the
P-drive output is prevented from going low when the N-
gate output is high.
C
FB
–
+
for adjustable versions.
I
TH
13k
V
S-GND
25mV TO 150mV
–
+
P-GND
V
G
CC
–
+
REFERENCE
550k
1.25V
SENSE
P-GATE
P-DRIVE
N-GATE
+
V
OS
SHDN1
V
FB
SENSE
LTC1159 • FD
100k
–