MX25L3205A Macronix International, MX25L3205A Datasheet - Page 33
MX25L3205A
Manufacturer Part Number
MX25L3205A
Description
32M-BIT [x 1] CMOS SERIAL eLiteFlash MEMORY
Manufacturer
Macronix International
Datasheet
1.MX25L3205A.pdf
(46 pages)
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Figure 29. READ ARRAY SEQUENCE (Parallel)
NOTES:
1. 1st Byte='03h'
2. 2nd Byte=Address 1(AD1), AD23=BIT7, AD22=BIT6, AD21=BIT5, AD20=BIT4,....AD16=BIT0.
3. 3rd Byte=Address 2(AD2), AD15=BIT7, AD14=BIT6, AD13=BIT5, AD12=BIT4,....AD8=BIT0.
4. 4th Byte=Address 3(AD3), AD7=BIT7, AD6=BIT6, ....AD0=BIT0.
5. From Byte 5, SO Would Output Array Data.
6. Under parallel mode, the fastest access clock freq. will be changed to 1.2MHz(SCLK pin clock freq.).
7. To read array in parallel mode requires a parallel mode command (55H) before the read command.
TM
Once in the parallel mode, eLiteFlash
Memory will not exit parallel mode until power-off.
8. In READ mode, RES mode and REMS mode, MXIC IC will enable output an entire cycle in advance compare with other
compatible vendor's spec.
P/N: PM1243
REV. 1.2, NOV. 06, 2006
33