cy2sstu32866 SpectraLinear Inc, cy2sstu32866 Datasheet - Page 4

• Manufacturer Part Number: cy2sstu32866
• Description: 1.8v, 25-bit 1 1 Or 14-bit 1 2 Jedec-compliant Data Register With Parity
• Manufacturer: SpectraLinear Inc

Rev 1.0, November 25, 2006
Pin Definition
Table 2. Flip Flop Function Table
Q12B, 13B
Q14B
Q15-25
QCSA#
QCSB#
QODTA
QODTB
QCKEA
QCKEB
PPO
QERR#
PAR_IN
NC
RESET#
Pin Name
H
H
H
H
H
H
H
H
H
H
H
H
L
X or Floating X or Floating X or Floating
B6, C6, E6, F6, K6, L6,
M6, N6, P6, R6, T6
H5
D5
A5
A2
D2
G1
A6, D6, H6
DCS#
(C0 = 0, C1 = 0)
(continued)
H
H
H
H
H
H
L
L
L
L
L
L
Pin Number
CSR#
H
H
H
H
H
H
L
L
L
L
L
L
P6, R6
T6
H5
H6
D5
D6
A5
A6
A2
D2
G1
B2, C2, E2, F2, K2,
L2, M2, N2, P2,
R2, T2
(C0 = 0, C1 = 1)
Pin Number
Inputs
L or H
L or H
L or H
L or H
CK
↓↑
↓↑
↓↑
↓↑
↓↑
↓↑
↓↑
↓↑
X or Floating
P6, R6
H5
H6
N5
N6
T5
T6
A2
D2
G1
B2, C2, E2, F2, K2,
L2, M2, N2, P2,
R2, T2
(C0 = 1, C1 = 1)
L or H
L or H
L or H
L or H
CK#
Pin Number
↓↑
↓↑
↓↑
↓↑
↓↑
↓↑
↓↑
↓↑
Dn, DODT, DCKE
X or Floating
Data Outputs that are suspended by the DCS#
and CSR# control
Data Outputs that are suspended by the DCS#
and CSR# control
Data Outputs that are suspended by the DCS#
and CSR# control
Data outputs that will not be suspended by the
DCS# and CSR# control
Data outputs that will not be suspended by the
DCS# and CSR# control
Data outputs that will not be suspended by the
DCS# and CSR# control
Data outputs that will not be suspended by the
DCS# and CSR# control
Data outputs that will not be suspended by the
DCS# and CSR# control
Data outputs that will not be suspended by the
DCS# and CSR# control
Partial parity out – indicates odd parity of inputs
D1-D25
Output error bit – generated one clock cycle after
the corresponding data output
Parity input – arrives one clock cycle after the
corresponding data input
No Connect Pins
H
X
H
X
H
X
H
X
L
L
L
L
Qn
Q0
Q0
Q0
Q0
Q0
Q0
CY2SSTU32866
Description
H
H
H
L
L
L
L
QCS# QODT, QCKE
Q0
Q0
Q0
Q0
H
H
H
H
L
L
L
L
L
Outputs
Page 4 of 24
Q0
Q0
Q0
Q0
H
H
H
H
L
L
L
L
L