upd78f9211grt2-jjg-a ETC-unknow, upd78f9211grt2-jjg-a Datasheet - Page 160

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upd78f9211grt2-jjg-a

Manufacturer Part Number
upd78f9211grt2-jjg-a
Description
8-bit Single-chip Microcontrollers
Manufacturer
ETC-unknow
Datasheet
160
The setting method is described below.
<Change the channel>
<Complete A/D conversion>
<1> Set bit 0 (ADCE) of the A/D converter mode register (ADM) to 1.
<2> Select the channel and conversion time using bits 1 and 0 (ADS1, ADS0) of the analog input channel
<3> Execute two NOP instructions or an instruction equivalent to two machine cycles.
<4> Set bit 7 (ADCS) of ADM to 1 to start A/D conversion.
<5> An interrupt request signal (INTAD) is generated.
<6> Transfer the A/D conversion data to the A/D conversion result register (ADCR, ADCRH).
<7> Change the channel using bits 1 and 0 (ADS1, ADS0) of ADS to start A/D conversion.
<8> An interrupt request signal (INTAD) is generated.
<9> Transfer the A/D conversion data to the A/D conversion result register (ADCR, ADCRH).
<10> Clear ADCS to 0.
<11> Clear ADCE to 0.
Cautions 1. Make sure the period of <1> to <4> is 1
specification register (ADS) and bits 5 to 3 (FR2 to FR0) of ADM.
2. It is no problem if the order of <1> and <2> is reversed.
3. <1> can be omitted. However, ignore the data resulting from the first conversion after
4. The period from <5> to <8> differs from the conversion time set using bits 5 to 3 (FR2 to
<4> in this case.
FR0) of ADM. The period from <7> to <8> is the conversion time set using FR2 to FR0.
CHAPTER 9 A/D CONVERTER
User’s Manual U16994EJ3V0UD
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