upd78f0124m6gba1-8et Renesas Electronics Corporation., upd78f0124m6gba1-8et Datasheet - Page 315
upd78f0124m6gba1-8et
Manufacturer Part Number
upd78f0124m6gba1-8et
Description
8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
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15.3 Registers Controlling Serial Interface CSI10
(1) Serial operation mode register 10 (CSIM10)
Address: FF80H After reset: 00H R/W
CSIM10
Serial interface CSI10 is controlled by the following four registers.
• Serial operation mode register 10 (CSIM10)
• Serial clock selection register 10 (CSIC10)
• Port mode register 1 (PM1)
• Port register 1 (P1)
Notes 1.
Caution Be sure to clear bit 5 to 0.
Symbol
CSIM10 is used to select the operation mode and enable or disable operation.
CSIM10 can be set by a 1-bit or 8-bit memory manipulation instruction.
RESET input clears this register to 00H.
2.
3.
4.
5.
6.
TRMD10
DIR10
Bit 0 is a read-only bit.
When using P10/SCK10/TxD0, P11/SI10/RxD0, or P12/SO10 as a general-purpose port, see
CHAPTER 4 PORT FUNCTIONS, Caution 3 of Figure 15-3, and Table 15-2.
Bit 0 (CSOT10) of CSIM10 and serial I/O shift register 10 (SIO10) are reset.
Do not rewrite TRMD10 when CSOT10 = 1 (during serial communication).
The SO10 output is fixed to the low level when TRMD10 is 0. Reception is started when data is read
from SIO10.
Do not rewrite DIR10 when CSOT10 = 1 (during serial communication).
CSOT10
CSIE10
CSIE10
0
<7>
Note 5
0
1
1
0
1
0
1
Note 6
Note 4
Figure 15-2. Format of Serial Operation Mode Register 10 (CSIM10)
Disables operation
Enables operation
Receive mode (transmission disabled).
Transmit/receive mode
MSB
LSB
Communication is stopped.
Communication is in progress.
TRMD10
6
Note 1
CHAPTER 15 SERIAL INTERFACE CSI10
Note 2
5
0
User’s Manual U16315EJ3V1UD
and asynchronously resets the internal circuit
Operation control in 3-wire serial I/O mode
DIR10
4
Transmit/receive mode control
Communication status flag
First bit specification
3
0
2
0
Note 3
.
1
0
CSOT10
0
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