upd78f0124m6gba1-8et Renesas Electronics Corporation., upd78f0124m6gba1-8et Datasheet - Page 337
upd78f0124m6gba1-8et
Manufacturer Part Number
upd78f0124m6gba1-8et
Description
8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD78F0124M6GBA1-8ET.pdf
(545 pages)
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(5) Program status word (PSW)
The program status word is a register used to hold the instruction execution result and the current status for an
interrupt request. The IE flag that sets maskable interrupt enable/disable and the ISP flag that controls multiple
interrupt servicing are mapped to the PSW.
Besides 8-bit read/write, this register can carry out operations using bit manipulation instructions and dedicated
instructions (EI and DI). When a vectored interrupt request is acknowledged, if the BRK instruction is executed,
the contents of the PSW are automatically saved into a stack and the IE flag is reset to 0. If a maskable interrupt
request is acknowledged, the contents of the priority specification flag of the acknowledged interrupt are
transferred to the ISP flag. The PSW contents are also saved into the stack with the PUSH PSW instruction.
They are restored from the stack with the RETI, RETB, and POP PSW instructions.
RESET input sets PSW to 02H.
PSW
<7>
IE
<6>
Z
RBS1
<5>
<4>
AC
Figure 16-6. Format of Program Status Word
RBS0
<3>
CHAPTER 16 INTERRUPT FUNCTIONS
2
0
User’s Manual U16315EJ3V1UD
<1>
ISP
CY
0
ISP
IE
0
1
0
1
Used when normal instruction is executed
After reset
02H
High-priority interrupt servicing (low-priority
interrupt disabled)
Interrupt request not acknowledged, or low-
priority interrupt servicing (all maskable
interrupts enabled)
Disabled
Enabled
Interrupt request acknowledgment enable/disable
Priority of interrupt currently being serviced
337
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