si3019-x-fs Silicon Laboratories, si3019-x-fs Datasheet - Page 11
si3019-x-fs
Manufacturer Part Number
si3019-x-fs
Description
Global Serial Interface Direct Access Arrangement
Manufacturer
Silicon Laboratories
Datasheet
1.SI3019-X-FS.pdf
(94 pages)
- Current page: 11 of 94
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Table 7. Switching Characteristics—Serial Interface (Master Mode, DCE = 0)
(V
Parameter
Cycle time, SCLK
SCLK Duty Cycle
Delay Time, SCLK↑ to FSYNC↓
Delay Time, SCLK↑ to SDO Valid
Delay Time, SCLK↑ to FSYNC↑
Setup Time, SDI Before SCLK ↓
Hold Time, SDI After SCLK ↓
Setup Time, FC↑ Before SCLK↑
Hold time, FC↑ After SCLK↑
Note: All timing is referenced to the 50% level of the waveform. Input test levels are V
D
= 3.0 to 3.6 V, T
SCLK
FSYNC
(mode 0)
FSYNC
(mode 1)
16-Bit
SDO
16-Bit
SDI
FC
A
=
0 to 70 °C, C
t
t
c
d2
Figure 3. Serial Interface Timing Diagram (DCE = 0)
t
d3
L
= 20 pF)
t
D15
d1
D15
t
su
D14
D14
Rev. 1.05
Symbol
t
t
t
t
t
t
t
t
h
dty
t
sfc
hfc
t
d1
d2
d3
su
c
h
Min
244
25
20
40
40
—
—
—
—
D1
D1
1/256 Fs
t
IH
sfc
Typ
= V
50
—
—
—
—
—
—
—
D0
D0
D0
D
Si3018/19/10
– 0.4 V, V
Max
20
20
20
—
—
—
—
—
—
t
IL
t
d3
hfc
= 0.4 V.
Unit
V
V
ns
ns
ns
ns
ns
ns
ns
ns
%
OH
OL
11
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