sc9822p Silan, sc9822p Datasheet - Page 30

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sc9822p

Manufacturer Part Number
sc9822p
Description
Mp3 Decoder With Esp Function And Cd Interface
Manufacturer
Silan
Datasheet
2. Interface with CD-DSP
HANGZHOU SILAN MICROELECTRONICS CO.,LTD
Http: www.silan.com.cn
Note: 1. the memory read-write operation in figure 7and figure 8, it needs Waiting before every Ack signal;
1) 24-bit Bck, the MSB send first, and the data is right flush, the word selection signal of right channel is low
2) 24-bit Bck, the MSB send first, and the data is left flush, the word selection signal of right channel is high
3) 16-bit Bck, the MSB send first, the word selection signal of right channel is low (EIAJ-16)/ the word
² HOST writes the start address of SDRAM/DRAM to MemAddrHigh(8’ h7A), MemAddrMid (8’ h7B),
² HOST originates data write operation, and appoints the number of the operation, the range is 2-255
² If HOST still need write data to external RAM, repeat the above operation; after HOST completes read
(EIAJ-24)
(IIS-24)
selection signal of right channel is high (IS-16)
MemAddrLow (8’ h7C) after read-write enable interrupt; and the read command(0x80)write to
MemCmd(8’ h7D);
bytes, and the default value is 2. Then read the data of BL*8bit (BL is the appointed value of BurstLength:
MemDataBL, and is expressed as n+1= MemDataBL in the following figure);
operation, send Mem read-write end command (0x13) to HostMcuCmd(8’ h70).
2. every time read or write, it needs a specific register (8’ h80) as the start address of Memory;
3. Only support 32 words (each word 16 bits) for Memory read-write addressing, that is to say every
read-write begins with 32 times address value.
Figure7 Memory write operation
REV:1.0
SC9822P
Page 30 of 30
2006.07.21

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