si4330 Silicon Laboratories, si4330 Datasheet - Page 136
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si4330
Manufacturer Part Number
si4330
Description
Si4330 Ism Receiver
Manufacturer
Silicon Laboratories
Datasheet
1.SI4330.pdf
(142 pages)
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Register 7Bh. Turn Around and 15.4 Length Compliance
Register 7Eh. RX FIFO Control
Si4330
Reset value = 01111011
Reset value = 00110111
136
Name
Name
Type
Type
Bit
Bit
6:3
1:0
7:6
5:0
Bit
Bit
7
2
15.4 Length
turn_around_en Turn Around Enable.
Reserved[6:3]
rxafthr[5:0]
15.4 Length
Reserved
phase[1:0]
R/W
D7
Name
D7
Name
Reserved
R/W
Reserved.
RX FIFO Almost Full Threshold.
D6
D6
15.4 Packet Length Compliance.
If set, then PK Length definition for both TX and RX will also include the CRC bytes, If
reset, then the Length refers ONLY to the DATA payload. For example, writing “9” to
this register when it is set, means we are sending/expecting “7” bytes of DATA, and the
other “2” should be the CRC (CRC should be enabled separately).
Reserved.
Enabling for the turn around functionality.
Turn Around Phase.
The RX to TX and vice-versa change in frequency will happen (if bit [2] is set) at the last
byte, and these two registers set the bit position in which the frequency shifts should
occur. Make sure it does not happen to early otherwise the last bits will be missed.
D5
Reserved[6:3]
D5
R/W
Preliminary Rev 0.2
D4
D4
D3
Function
Function
D3
rxafthr[5:0]
turn_around_en
R/W
R/W
D2
D2
D1
D1
phase[1:0]
R/W
D0
D0