si4420 Silicon Laboratories, si4420 Datasheet - Page 16
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si4420
Manufacturer Part Number
si4420
Description
Si4420 Universal Ism Band Fsk Transceiver
Manufacturer
Silicon Laboratories
Datasheet
1.SI4420.pdf
(32 pages)
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Bits 4-3 (g1 to g0): LNA gain select:
Bits 2-0 (r2 to r0): RSSI detector threshold:
The RSSI threshold depends on the LNA gain, the real RSSI threshold can be calculated:
6. Data Filter Command
Bit 7 (al): Clock recovery (CR) auto lock control, if set.
Bit 6 (ml): Clock recovery lock control
Bits 4 (s): Select the type of the data filter:
Bit
15
1
RSSI
CR will start in fast mode, then after locking it will automatically switch to slow mode.
1: fast mode, fast attack and fast release (6 to 8 bit preamble (1010...) is recommended)
0: slow mode, slow attack and slow release (12 to 16 bit preamble is recommended)
Using the slow mode requires more accurate bit timing (see Data Rate Command).
Digital: This is a digital realization of an analog RC filter followed by a comparator with hysteresis. The time constant is
automatically adjusted to the bit rate defined by the Data Rate Command.
Note: Bit rate can not exceed 115 kpbs in this mode.
Analog RC filter: The demodulator output is fed to pin 7 over a 10 kOhm resistor. The filter cut-off frequency is set by the external
capacitor connected to this pin and VSS.
C = 1 / (3 * R * Bit Rate)
Note: If analog RC filter is selected the internal clock recovery circuit and the FIFO can not be used.
th
14
=RSSI
1
setth
13
0
+G
LNA
12
0
,
11
0
therefore the suggested value for 9600 bps is 3.3 nF
10
0
9
1
g1
0
0
1
1
s
0
1
r2
0
0
0
0
1
1
1
1
g0
8
0
0
1
0
1
r1
0
0
1
1
0
0
1
1
al
7
relative to maximum [dB]
Analog RC filter
r0
0
1
0
1
0
1
0
1
Filter Type
Digital filter
ml
6
RSSI
Reserved
Reserved
-14
-20
-6
5
1
0
setth
-103
-97
-91
-85
-79
-73
[dBm]
4
s
3
1
f2
2
f1
1
f0
0
C22Ch
POR
Si4420
16