si4420 Silicon Laboratories, si4420 Datasheet - Page 3
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si4420
Manufacturer Part Number
si4420
Description
Si4420 Universal Ism Band Fsk Transceiver
Manufacturer
Silicon Laboratories
Datasheet
1.SI4420.pdf
(32 pages)
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Data Validity Blocks
RSSI
A digital RSSI output is provided to monitor the input signal level.
It goes high if the received signal strength exceeds a given
preprogrammed level. An analog RSSI signal is also available.
The RSSI settling time depends on the external filter capacitor.
Pin 15 is used as analog RSSI output. The digital RSSI can be
can be monitored by reading the status register.
DQD
The Data Quality Detector is based on counting the spikes on the
unfiltered received data. For correct operation, the “DQD
threshold” parameter must be filled in by using the Data Filter
Command.
AFC
By using an integrated Automatic Frequency Control (AFC)
feature, the receiver can minimize the TX/RX offset in discrete
steps, allowing the use of:
Crystal Oscillator
The Si4420 has a single-pin crystal oscillator circuit, which
provides a 10 MHz reference signal for the PLL. To reduce
external parts and simplify design, the crystal load capacitor is
internal and programmable. Guidelines for selecting the
appropriate crystal can be found later in this datasheet.
The
microcontroller; so accurate timing is possible without the need
for a second crystal.
Inexpensive, low accuracy crystals
Narrower receiver bandwidth (i.e. increased sensitivity)
Higher data rate
transceiver
Analog RSSI Voltage vs. RF Input Power
P1
P2
P3
P4
can
-100 dBm
-100 dBm
-65 dBm
-65 dBm
supply the
1300 mV
1000 mV
600 mV
300 mV
clock
signal
for
the
When the microcontroller turns the crystal oscillator off by
clearing the appropriate bit using the Configuration Setting
Command, the chip provides a fixed number (196) of further
clock pulses (“clock tail”) for the microcontroller to let it go to idle
or sleep mode.
Low Battery Voltage Detector
The low battery detector circuit monitors the supply voltage and
generates an interrupt if it falls below a programmable threshold
level. The detector circuit has 50 mV hysteresis.
Wake-Up Timer
The wake-up timer has very low current consumption (1.5 μA
typical) and can be programmed from 1 ms to several days with
an accuracy of ±5%.
It calibrates itself to the crystal oscillator at every startup. When
the crystal oscillator is switched off, the calibration circuit
switches it on only long enough for a quick calibration (a few
milliseconds) to facilitate accurate wake-up timing.
Event Handling
In order to minimize current consumption, the transceiver
supports different power saving modes. Active mode can be
initiated by several wake-up events (negative logical pulse on
nINT input, wake-up timer timeout, low supply voltage detection,
on-chip FIFO filled up or receiving a request through the serial
interface).
If any wake-up event occurs, the wake-up logic generates an
interrupt signal, which can be used to wake up the
microcontroller,
microcontroller has to be active. The source of the interrupt can
be read out from the transceiver by the microcontroller through
the SDO pin.
Interface and Controller
An SPI compatible serial interface lets the user select the
frequency band, center frequency of the synthesizer, and the
bandwidth of the baseband signal path. Division ratio for the
microcontroller clock, wake-up timer period, and low supply
voltage detector threshold are also programmable. Any of these
auxiliary functions can be disabled when not needed. All
parameters are set to default after power-on; the programmed
values are retained during sleep mode. The interface supports
the read-out of a status register, providing detailed information
about the status of the transceiver and the received data.
The transmitter block is equipped with an 8 bit wide TX data
register. It is possible to write 8 bits into the register in burst
mode and the internal bit rate generator transmits the bits out
with the predefined rate.
It is also possible to store the received data bits into a FIFO
register and read them out in a buffered mode.
effectively
reducing
the
period
Si4420
the
3