16t202da1j Pacer Components, 16t202da1j Datasheet - Page 12

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16t202da1j

Manufacturer Part Number
16t202da1j
Description
2x16 Lcd Compatible Vfd Module
Manufacturer
Pacer Components
Datasheet
2X16 LCD Compatible VFD Module
6. INSTRUCTIONS
6.1 Outline
* Instruction List
Display Clear
Cursor Home
Entry Mode Set
Display ON/OFF Control
Cursor or Display Shift
Function Set
CG-RAM Address Set
DD-RAM Address Set
Busy Flag and Address
Counter Reading
Data Writing to CG- or
DD-RAM
Data Reading from CG-
or DD-RAM
REMARKS:
* DD-RAM: Display
* CG-RAM: Character
* ACG: CG-RAM
* ADD: DD-RAM
* ACC: Address Counter
Data RAM
Generator RAM
Address
Address
Only the instruction register (IR) and the data register (DR) of the VFD controller can be controlled by the user's MPU.
Before starting the internal operation of the controller, control information is temporarily stored into these registers to
allow interfacing with various MPUs, which operate at different speeds, or various peripheral control devices. The
internal operation of the controller is determined by signals sent from the MPU. These signals, which include register
selection signal (RS), read or write signal (R/W), and the data bus (DB0 to DB7), make up the controller instructions.
There are four categories of instructions which are:
Normally, instructions that perform data transfer with internal RAM are used the most.
However, auto-incrementation by 1 (or auto-decrementation by 1) of internal RAM addresses after each data write can
lighten the program load of the MPU. Since the display shift instruction can perform concurrently with display data
write, the user can minimize system development time with maximum programming efficiency.
When an instruction is being executed for internal operation, no instruction other than the busy flag /address read
instruction can be executed. Because the busy flag is set to 1 while an instruction is being executed, check it to make
sure it is 0 before sending another instruction from the MPU.
Instructions
* Designate controller functions, such as display format, data length, etc.
* Set internal RAM addresses.
* Perform data transfer with internal RAM.
* Perform miscellaneous functions.
* I/D = 1: Increment
* I/D = 0: Decrement
* S = 1: Display Shift Enabled
* S = 0: Cursor Shift Enabled
* S/C = 1: Display Shift
* S/C = 0: Cursor Move
* R/L = 1: Shift to the Right
* R/L = 0: Shift to the Left
RS R/W D7
Control
0
0
0
0
0
0
0
0
0
1
1
0
0
0
0
0
0
1
0
1
0
0
BF
0
0
0
0
0
0
0
1
D6
0
0
0
0
0
1
0
ADD (DD-RAM Address)
D5
0
0
0
1
0
0
ACC (Address Counter)
Instruction Code
Character Code
Character Code
ACG (CG-RAM Address)
16T202DA1J (Rev. 4.0)
D4
IF
0
0
0
0
1
Page - 12 of 17
S/C R/L
D3
N
0
0
0
1
D2
D
0
0
1
*
BR1 BR0
D1
I/D
C
0
1
*
D0
B
S
1
*
*
Clears all display and sets DD-RAM address 0 in
address counter.
Sets DD-RAM address 0 in ACC. Also returns
the display being shifted to the original position.
DD-RAM contents remain unchanged.
Sets the cursor direction and specifies display
shift. These operations are performed during
writing/reading data.
Sets all display ON/OFF (D), cursor ON/OFF (C),
cursor blink of character position (B).
Shifts display or cursor, keeping DD-RAM
contents.
Sets data length (IF), number of display lines(N),
Set brightness level(BR1,BR0)
Sets the CG-RAM address.
Sets the DD-RAM address.
Reads busy flag (BF) and address counter (ACC).
Writes data into CG-RAM or DD-RAM.
Reads data from CG-RAM or DD-RAM.
* IF = 1: 8-bit Operation
* IF = 0: 4-bit Operation
* N = 1: 2 Lines Display
* N = 0: 1 Line Display
* BR1, BR0 =
* BF = 1: Busy (Internally operating)
* BF = 0: Not busy (Instruction acceptable)
00: 100%, 01: 75%, 10: 50%, 11: 25%
Descriptions

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