t6020m ATMEL Corporation, t6020m Datasheet - Page 5

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t6020m

Manufacturer Part Number
t6020m
Description
Low-current Microcontroller For Watchdog Function
Manufacturer
ATMEL Corporation
Datasheet

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1
The T6020M is a member of Atmel Wireless &
Microcontrollers’ family of 4-bit single-chip micro-
controllers. They contain ROM, RAM, parallel I/O ports,
one 8-bit programmable multifunction timer/counter,
voltage supervisor, interval timer with watchdog function
and a sophisticated on-chip clock generation with inte-
grated RC-oscillators.
2
2.1
The MARC4 microcontroller consists of an advanced
stack-based, 4-bit CPU core and on-chip peripherals. The
Rev. A3, 02-Apr-01
Introduction
MARC4 Architecture
General Description
System
Reset
clock
Clock
Sleep
Reset
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Program
memory
On–chip peripheral modules
Instruction
controller
Interrupt
decoder
Instruction
bus
I/O bus
Figure 3. MARC4 core
MARC4 CORE
PC
Memory bus
CPU is based on the HARVARD architecture with
physically separate program memory (ROM) and data
memory
instruction bus, the memory bus and the I/O bus, are used
for parallel communication between ROM, RAM and
peripherals. This enhances program execution speed by
allowing both instruction prefetching, and a simultaneous
communication to the on-chip peripheral circuitry. The
extremely powerful integrated interrupt controller with
associated eight prioritized interrupt levels supports fast
and efficient processing of hardware events. The MARC4
is designed for the high-level programming language
qFORTH. The core includes both, an expression and a
return stack. This architecture enables high-level
language programming without any loss of efficiency or
code density.
CCR
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SP
RP
X
Y
(RAM).
TOS
ALU
Three
256 x 4-bit
RAM
independent
T6020M
buses, the
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