ltc3873 Linear Technology Corporation, ltc3873 Datasheet - Page 7

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ltc3873

Manufacturer Part Number
ltc3873
Description
No Rsense Constant Frequency Current Mode Boost/flyback/sepic Dc/dc Controller
Manufacturer
Linear Technology Corporation
Datasheet

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OPERATION
(nominally 8.4V) at least momentarily to enable LTC3873
operation. The V
OFF
the LTC3873. This wide UVLO hysteresis range supports
the use of trickle charger on the fl yback transformer to
power the LTC3873—see the section, V
RUN/SS pin can be driven below V
to force the LTC3873 into shutdown. When the chip is off,
the input supply current is typically only 55μA.
Soft-Start
Leave the RUN/SS pin open to use the internal 3.3ms soft-
start. During the internal soft-start, a voltage ramp limits
the V
level to full current level. The soft-start can be lengthened
by placing an external capacitor from the RUN/SS pin to
the GND. A 3μA current will charge the capacitor, pulling
the RUN/SS pin above the shutdown threshold and a 15µA
pull-up current will continue to ramp RUN/SS to limit V
during the start-up. When RUN/SS is driven by an external
logic, a minimum of 2.75V logic is recommended to allow
the maximum I
(nominally 4V) before undervoltage lockout disables
ITH
. 3.3ms is required for I
TH
CC
range.
voltage is then allowed to fall to V
TH
to ramp from zero current
Figure 4. Maximum SENSE Threshold Voltage vs Duty Cycle
SHDN
CC
(nominally 0.7V)
300
250
200
150
100
Bias Power. The
50
0
1
20
TURN-
IPRG = FLOAT
IPRG = HIGH
IPRG = LOW
DUTY CYCLE (%)
ITH
40
Light Load Operation
Under very light load current conditions, the I
age will be very close to the zero current level of 0.85V.
As the load current decreases further, an internal offset at
the current comparator input will assure that the current
comparator remains tripped (even at zero load current) and
the regulator will start to skip cycles in order to maintain
regulation. This behavior allows the regulator to maintain
constant frequency down to very light loads, resulting in low
output ripple as well as low audible noise and reduced RF
interference while providing high light load effi ciency.
Current Sense
During the switch on-time, the control circuit limits the
maximum voltage drop across the current sense com-
ponent to about 295mV, 110mV and 185mV at low duty
cycle with IPRG tied to V
tively. It is reduced with increasing duty cycle as shown
in Figure 4.
60
80
3873 F04
100
IN
, GND or left fl oating respec-
LTC3873
TH
pin volt-
7
3873f

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