ltc3787gn Linear Technology Corporation, ltc3787gn Datasheet - Page 26

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ltc3787gn

Manufacturer Part Number
ltc3787gn
Description
Ltc3787 - Polyphase Synchronous Boost Controller
Manufacturer
Linear Technology Corporation
Datasheet

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Part Number:
LTC3787GN
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LTC3787
applicaTions inForMaTion
A 6.8μH inductor will produce a 31% ripple current. The
peak inductor current will be the maximum DC value plus
one half the ripple current, or 9.25A.
The R
maximum current sense voltage specification with some
accommodation for tolerances:
Choosing 1% resistors: R
output voltage of 24.072V.
The power dissipation on the top side MOSFET in each chan-
nel can be easily estimated. Choosing a Vishay Si7848BDP
MOSFET results in: R
At maximum input voltage with T (estimated) = 50°C:
C
The maximum output current peak is:
A low ESR (5mΩ) capacitor is suggested. This capacitor
will limit output voltage ripple to 46.5mV (assuming ESR
dominate ripple).
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the IC. These items are also illustrated graphically in the
layout diagram of Figure 8. Figure 9 illustrates the current
waveforms present in the various branches of the 2-phase
synchronous regulators operating in the continuous mode.
Check the following in your layout:
1. Put the bottom N-channel MOSFETs MBOT1 and MBOT2
26
OUT
and the top N-channel MOSFETs MTOP1 and MTOP2
in one compact area with C
I
R
P
OUT(PEAK)
MAIN
SENSE
is chosen to filter the square current in the output.
SENSE
=
(24V – 12V) 24V
+ (1.7)(24V)
• 1+ (0.005)(50°C – 25°C)
resistor value can be calculated by using the
75mV
9.25A
 
= 8 • 1+
(12V)
 
= 0.008Ω
DS(ON)
2
31%
3
A
2
12V
4A
= 5k and R
= 0.012Ω, C
 
• (4A)
OUT
= 9.3A
(150pF)(350kHz) = 0.7W
.
2
B
  • 0.008Ω
= 95.3k yields an
MILLER
= 150pF .
2. Are the signal and power grounds kept separate? The
3. Does the LTC3787 VFB pin’s resistive divider connect to
4. Are the SENSE
5. Is the INTV
6. Keep the switching nodes (SW1, SW2), top gate nodes
7. Use a modified “star ground” technique: a low imped-
combined IC signal ground pin and the ground return of
C
The path formed by the bottom N-channel MOSFET
and the capacitor should have short leads and PC trace
lengths. The output capacitor (–) terminals should be
connected as close as possible to the source terminals
of the bottom MOSFETs.
the (+) terminal of C
connected between the (+) terminal of C
ground and placed close to the VFB pin. The feedback
resistor connections should not be along the high cur-
rent input feeds from the input capacitor(s).
minimum PC trace spacing? The filter capacitor between
SENSE
to the IC. Ensure accurate current sensing with Kelvin
connections at the sense resistor.
to the IC, between the INTV
pins? This capacitor carries the MOSFET drivers’ cur-
rent peaks. An additional 1μF ceramic capacitor placed
immediately next to the INTV
improve noise performance substantially.
(TG1, TG2) and boost nodes (BOOST1, BOOST2) away
from sensitive small-signal nodes, especially from
the opposites channel’s voltage and current sensing
feedback pins. All of these nodes have very large and
fast moving signals and, therefore, should be kept on
the output side of the LTC3787 and occupy a minimal
PC trace area.
ance, large copper area central grounding point on
the same side of the PC board as the input and output
capacitors with tie-ins for the bottom of the INTV
decoupling capacitor, the bottom of the voltage feedback
resistive divider and the SGND pin of the IC.
INTVCC
+
must return to the combined C
and SENSE
CC
decoupling capacitor connected close
and SENSE
OUT
should be as close as possible
? The resistive divider must be
+
CC
CC
leads routed together with
and PGND pins can help
and the power ground
OUT
OUT
(–) terminals.
and signal
3787fa
CC

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