tda9950 NXP Semiconductors, tda9950 Datasheet - Page 4

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tda9950

Manufacturer Part Number
tda9950
Description
Tda9950 Cec/i?c-bus Translator
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
TDA9950_1
Product data sheet
7.2 Pin description
Table 3.
[1]
Symbol
CEC_POL
INT
CEC_OUT
RST
V
XTAL1
XTAL2
CEC_IN
SDA
SCL
RSVD2
RSVD3
RSVD4
RSVD5
V
RSVD6
RSVD7
INT_POL
A1
A0
SS
DD
I = input, O = output, P = power supply.
Pin description
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Type
I
O
O
I
P
I
O
I
I/O
I
I
O
O
I
P
I
I
I
I
I
Rev. 01 — 16 November 2007
[1]
Description
CEC_POL — Sets the polarity of the signal on pin CEC_OUT.
Leave floating or pull-up to V
(CEC line), or connect to V
(transistor gate). This input is latched at reset.
INT — Interrupt line to the host processor to indicate data is
available for reading. The polarity of this signal depends on the
state of pin INT_POL.
CEC_OUT — Output for CEC line (open-drain). The polarity of
this signal depends on the state of pin CEC_POL.
RST — External reset input. A LOW state on this pin resets the
translator.
Ground: 0 V reference (GND).
XTAL1 — Input to the oscillator circuit and internal clock
generator circuits (12 MHz crystal).
XTAL2 — Output from the oscillator amplifier.
CEC_IN — Input for CEC line.
SDA — I
SCL — I
RSVD2 — Reserved pin (should be connected to ground).
RSVD3 — Reserved pin.
RSVD4 — Reserved pin.
RSVD5 — Reserved pin (should be connected to ground).
Power supply — This is the (core digital 3.3 V) power supply
voltage for normal operation as well as Idle and Power-down
modes.
RSVD6 — Reserved pin (should be connected to ground).
RSVD7 — Reserved pin (should be connected to ground).
INT_POL — Sets the polarity of the active output required on
the INT signal (pin 2). Leave floating or pull-up to V
HIGH output when active (rising edge), connect to V
LOW output when active (falling edge). This input is latched at
reset.
A1 — I
A0 — I
2
2
C-bus slave address bit 2.
C-bus slave address bit 1.
2
2
C-bus serial clock input.
C-bus serial data input/output (open-drain).
SS
DD
for bit starting with rising edge
for bit starting with falling edge
CEC/I
TDA9950
© NXP B.V. 2007. All rights reserved.
2
C-bus translator
DD
SS
for a
for a
4 of 24

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