adv7390 Analog Devices, Inc., adv7390 Datasheet - Page 35
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adv7390
Manufacturer Part Number
adv7390
Description
Low Power, Chip Scale 10-bit Sd/hd Video Encoder
Manufacturer
Analog Devices, Inc.
Datasheet
1.ADV7390.pdf
(96 pages)
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Table 24. Register 0x84 to Register 0x87
SR7 to
SR0
0x84
0x86
0x87
1
2
When set to 0, the horizontal/vertical counters automatically wrap around at the end of the line/field/frame of the selected standard. When set to 1, the
horizontal/vertical counters are free running and wrap around when external sync signals indicate to do so.
Available on the ADV7392/ADV7393 (40-pin devices) only.
SD Mode
SD Mode
SD Mode
Register
Register 4
Register 5
Register 6
Bit Description
SD VSYNC-3H.
SD SFL/SCR/TR Mode Select.
SD Active Video Length.
SD Chroma.
SD Burst.
SD Color Bars.
SD Luma/Chroma Swap.
NTSC Color Subcarrier Adjust (Delay from
the falling edge of output HSYNC pulse to
start of color burst).
Reserved.
SD EIA/CEA-861B Synchronization
Compliance.
Reserved.
SD Horizontal/Vertical Counter Mode.
SD RGB Color Swap.
SD PrPb Scale.
SD Y Scale.
SD Hue Adjust.
SD Brightness.
SD Luma SSAF Gain.
SD Input Standard Auto Detection.
Reserved.
SD RGB Input Enable.
2
2
1
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7
0
1
0
1
0
1
6
0
1
0
1
0
5
0
1
0
0
1
Bit Number
ADV7390/ADV7391/ADV7392/ADV7393
4
0
1
0
0
1
3
0
1
0
1
0
1
2
0
0
1
1
0
0
1
1
0
1
0
1
0
0
1
1
0
1
0
0
1
0
1
0
1
0
1
Register Setting
Disabled
VSYNC= 2.5 lines (PAL),
VSYNC= 3 lines (NTSC)
Disabled
Subcarrier reset mode enabled
Timing reset mode enabled
SFL mode enabled
720 pixels
710 (NTSC), 702 (PAL)
Chroma enabled
Chroma disabled
Enabled
Disabled
Disabled
Enabled
DAC 2 = luma, DAC 3 = chroma
DAC 2 = chroma, DAC 3 = luma
5.17 μs
5.31 μs
5.59 μs (must be set for
Macrovision compliance)
Reserved
Disabled
Enabled
Update field/line counter
Field/line counter free running
Normal
Color reversal enabled
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
0 must be written to this bit
SD YCrCb input
SD RGB input
Reset
Value
0x00
0x02
0x00