adsp-2186bca-160 Analog Devices, Inc., adsp-2186bca-160 Datasheet - Page 16
adsp-2186bca-160
Manufacturer Part Number
adsp-2186bca-160
Description
Dsp Microcomputer
Manufacturer
Analog Devices, Inc.
Datasheet
1.ADSP-2186BCA-160.pdf
(36 pages)
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ADSP-2186
TIMING PARAMETERS
Parameter
Clock Signals and Reset
Timing Requirements:
t
t
t
Switching Characteristics:
t
t
t
Control Signals
Timing Requirements:
t
t
t
NOTE
1
CKI
CKIL
CKIH
CKL
CKH
CKOH
RSP
MS
MH
Applies after power-up sequence is complete. Internal phase lock loop requires no more than 2000 CLKIN cycles assuming stable CLKIN (not including crystal
oscillator start-up time).
CLKIN Period
CLKIN Width Low
CLKIN Width High
CLKOUT Width Low
CLKOUT Width High
CLKIN High to CLKOUT High
RESET Width Low
Mode Setup before RESET High
Mode Setup after RESET High
CLKOUT
PF(2:0)
RESET
CLKIN
*
1
*
PF2 IS MODE C, PF1 IS MODE B, PF0 IS MODE A
Figure 11. Clock Signals
t
CKIL
t
CKI
t
MS
t
CKL
–16–
t
MH
Min
50
20
20
0.5 t
0.5 t
0
5 t
2
5
t
CKOH
t
CKH
CK
CK
CK
t
CKIH
– 7
– 7
Max
150
20
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
REV. A
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