adsp-21371kswz-2a Analog Devices, Inc., adsp-21371kswz-2a Datasheet - Page 34

no-image

adsp-21371kswz-2a

Manufacturer Part Number
adsp-21371kswz-2a
Description
Sharc Processor
Manufacturer
Analog Devices, Inc.
Datasheet
ADSP-21371/ADSP-21375
1
This figure reflects changes made to support left-justified sample pair mode.
(DATA CHANNEL A/B)
(DATA CHANNEL A/B)
DAI_P20 - 1
DAI_P20 - 1
DAI_P20 - 1
DAI_P20 - 1
NOTE: SERIAL PORT SIGNALS (SCLK, FS,
USING THE SRU. THE TIMING SPECIFICATIONS PROVIDED HERE ARE VALID AT THE DAI_P20
THE CHARACTERIZED AC SPORT TIMINGS ARE APPLICABLE WHEN INTERNAL CLOCKS AND FRAMES
ARE LOOPED BACK FROM THE PIN,NOT ROUTED DIRECTLY THROUGH SRU.
DAI_P20 - 1
DAI_P20 - 1
(SCLK)
(SCLK)
(FS)
(FS)
DRIVE
DRIVE
t
DDTLFSE
t
D DTLFSE
t
t
SFSE/I
SFSE/I
t
DDTENFS
Figure 20. External Late Frame Sync
t
EXTERNAL RECEIVE FS WITH MCE = 1, MFD = 0
DDTENFS
Rev. B | Page 34 of 52 | June 2008
LATE EXTERNAL TRANSMIT FS
SAMPLE
SAMPLE
DATA CHANNEL
1ST BIT
1ST BIT
t
HDTE/I
t
HDTE/I
DRIVE
DRIVE
t
A/B) ARE ROUTED TO THE DAI_P20
HFSE/I
t
HFSE/I
1
t
DDTE/I
t
DDTE/I
2ND BIT
2ND BIT
-
-
1 PINS.
1 PINS

Related parts for adsp-21371kswz-2a