dsp56001a Freescale Semiconductor, Inc, dsp56001a Datasheet - Page 16

• Manufacturer Part Number: dsp56001a
• Description: 24-bit Digital Signal Processor
• Manufacturer: Freescale Semiconductor, Inc

DSP56001A
Serial Communications Interface Port
1-10
Signal Name
RXD
PC0
TXD
PC1
SCLK
PC2
SERIAL COMMUNICATIONS INTERFACE PORT
Input or
Input or
Input or
Output
Output
Output
Output
Output
Input/
Signal
Input
Type
Table 1-10 Serial Communications Interface (SCI) Signals
Tri-stated Receive Data (RXD)—This input receives byte-oriented data and
Tri-stated Transmit Data (TXD)—This output transmits serial data from the
Tri-stated SCI Clock (SCLK)—This signal provides an input or output clock
during
Reset
State
Freescale Semiconductor, Inc.
For More Information On This Product,
transfers the data to the SCI receive shift register. Input data can be
sampled on either the positive edge or on the negative edge of the
receive clock, depending on how the SCI control register is
programmed.
Port C GPIO 0 (PC0)—This signal is a GPIO signal called PC0 when
the SCI RXD function is not being used.
After reset, the default state is GPIO input.
SCI transmit shift register. In the default configuration, the data
changes on the positive clock edge and is valid on the negative clock
edge. The user can reverse this clock polarity by programming the
SCI control register appropriately.
Port C GPIO 1 (PC1)—This signal is a GPIO signal called PC1 when
the SCI TXD function is not being used.
After reset, the default state is GPIO input.
from which the transmit/receive baud rate is derived in the
Asynchronous mode, and from which data is transferred in the
Synchronous mode. The direction and function of the signal is
defined by the RCM bit in the SCI Clock Control Register (SCCR).
Port C GPIO 2 (PC2)—This signal is a GPIO signal called PC2 when
the SCI TCLK function is not being used.
After reset, the default state is GPIO input.
DSP56001A/D, Rev. 1
Go to: www.freescale.com
Signal Description
MOTOROLA