mc68hc908mr24 Freescale Semiconductor, Inc, mc68hc908mr24 Datasheet - Page 334

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mc68hc908mr24

Manufacturer Part Number
mc68hc908mr24
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Input/Output (I/O) Ports
15.8.2 Data Direction Register F
Advance Information
334
NOTE:
NOTE:
Address:
PTF[5:0] — Port F Data Bits
Data direction register F (DDRF) does not affect the data direction of port
F pins that are being used by the SPI or SCI module. However, the
DDRF bits always determine whether reading port F returns the states
of the latches or the states of the pins.
Data direction register F (DDRF) determines whether each port F pin is
an input or an output. Writing a logic 1 to a DDRF bit enables the output
buffer for the corresponding port F pin; a logic 0 disables the output
buffer.
DDRF[5:0] — Data Direction Register F Bits
Avoid glitches on port F pins by writing to the port F data register before
changing data direction register F bits from 0 to 1.
Figure 15-18
Read:
Read:
Write:
These read/write bits are software programmable. Data direction of
each port F pin is under the control of the corresponding bit in data
direction register F. Reset has no effect on PTF[5:0].
These read/write bits control port F data direction. Reset clears
DDRF[5:0], configuring all port F pins as inputs.
1 = Corresponding port F pin configured as output
0 = Corresponding port F pin configured as input
$000D
Bit 7
R
R
Figure 15-17. Data Direction Register F (DDRF)
0
shows the port F I/O logic.
Input/Output (I/O) Ports
= Reserved
R
6
0
DDRF5
5
0
DDRF4
4
0
DDRF3
3
0
MC68HC908MR24
DDRF2
Freescale Semiconductor
2
0
DDRF1
1
0
Rev. 4.1
DDRF0
Bit 0
0

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