mc68hc908mr24 Freescale Semiconductor, Inc, mc68hc908mr24 Datasheet - Page 67

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mc68hc908mr24

Manufacturer Part Number
mc68hc908mr24
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
4.10 Wait Mode
MC68HC908MR24 — Rev. 4.1
Freescale Semiconductor
BPR0 — Block Protect Register Bit 0
By programming the block protect bits, a portion of the memory will be
locked so that no further erase or program operations may be
performed. Programming more than one bit at a time is redundant. If
both bit 1 and bit 2 are set, for instance, the address range $C000
through $FFFF is locked. If all bits are erased, then all of the memory is
available for erase and program. The presence of a voltage + V
IRQ pin will bypass the block protection so that all of the memory,
including the block protect register, is open for program and erase
operations.
Putting the MCU into wait mode while the FLASH is in read mode does
not affect the operation of the FLASH memory directly, but there will not
be any memory activity since the CPU is inactive.
The WAIT instruction should not be executed while performing a
program or erase operation on the FLASH. When the MCU is put into
wait mode, the charge pump for the FLASH is disabled so that either a
program or erase operation will not continue. If the memory is in either
program mode (PGM = 1, HVEN = 1) or erase mode (ERASE = 1,
HVEN = 1), then it will remain in that mode during wait. Exit from wait
must now be done with a reset rather than an interrupt because if exiting
wait with an interrupt, the memory will not be in read mode and the
interrupt vector cannot be read from the memory.
This bit protects the memory contents in the address range
$A000–$FFFF.
1 = Address range protected from erase or program
0 = Address range open to erase or program
FLASH Memory
Advance Information
FLASH Memory
HI
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