mc68hc912dg128 Freescale Semiconductor, Inc, mc68hc912dg128 Datasheet - Page 174

• Manufacturer Part Number: mc68hc912dg128
• Description: M68hc12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Clock Functions
REFDV — Reference Divider Register
CGTFLG — Clock Generator Test Register
PLLFLG — PLL Flags
Technical Data
174
RESET:
RESET:
RESET:
TSTOUT7
LOCKIF
Bit 7
Bit 7
Bit 7
0
0
0
0
TSTOUT6
LOCK
6
0
6
0
0
6
0
Read anytime, write anytime, except when BCSP = 1.
The reference divider bits provides a finer granularity for the PLL
multiplier steps. The reference frequency is divided by REFDV + 1.
Always reads zero, except in test modes.
Read anytime, refer to each bit for write conditions.
LOCKIF — PLL Lock Interrupt Flag
Freescale Semiconductor, Inc.
To clear the flag, write one to this bit in PLLFLG. Cleared in limp-home
mode.
For More Information On This Product,
0 = No change in LOCK bit.
1 = LOCK condition has changed, either from a locked state to an
TSTOUT5
5
0
0
5
0
0
5
0
unlocked state or vice versa.
Go to: www.freescale.com
TSTOUT4
Clock Functions
4
0
0
4
0
0
4
0
TSTOUT3
3
0
0
3
0
0
3
0
TSTOUT2
REFDV2
2
0
0
2
0
2
0
TSTOUT1 TSTOUT0
REFDV1
MC68HC912DG128 — Rev 3.0
LHIF
1
0
1
0
1
0
REFDV0
LHOME
Bit 0
Bit 0
Bit 0
0
0
0
MOTOROLA
$003A
$003B
$0039