mc68hc912dg128 Freescale Semiconductor, Inc, mc68hc912dg128 Datasheet - Page 339
mc68hc912dg128
Manufacturer Part Number
mc68hc912dg128
Description
M68hc12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC68HC912DG128.pdf
(452 pages)
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MC68HC912DG128 — Rev 3.0
MOTOROLA
SLPRQ — SLEEP request
SFTRES— SOFT_RESET
Freescale Semiconductor, Inc.
This flag allows to request the msCAN12 to go into an internal power-
saving mode (see
When this bit is set by the CPU, the msCAN12 immediately enters the
SOFT_RESET state. Any ongoing transmission or reception is
aborted and synchronisation to the bus is lost.
The following registers will go into and stay in the same state as out
of hard reset: CMCR0, CRFLG, CRIER, CTFLG, CTCR.
The registers CMCR1, CBTR0, CBTR1, CIDAC, CIDAR0–3,
CIDMR0–3 can only be written by the CPU when the msCAN12 is in
SOFT_RESET state. The values of the error counters are not affected
by SOFT_RESET.
When this bit is cleared by the CPU, the msCAN12 will try to
synchronize to the CAN bus: If the msCAN12 is not in BUSOFF state
it will be synchronized after 11 recessive bits on the bus; if the
msCAN12 is in BUSOFF state it continues to wait for 128 occurrences
of 11 recessive bits.
Clearing SFTRES and writing to other bits in CMCR0 must be in
separate instructions.
For More Information On This Product,
0 = Wake-up – The msCAN12 will function normally.
1 = SLEEP request – The msCAN12 will go into SLEEP Mode
0 = Normal operation
1 = msCAN12 in SOFT_RESET state.
when the CAN bus is idle, i.e. the module is not receiving a
message and all transmit buffers are empty.
Go to: www.freescale.com
MSCAN Controller
msCAN12 SLEEP
Programmer’s Model of Control Registers
Mode).
MSCAN Controller
Technical Data
339
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