mc68hc05j1avp Freescale Semiconductor, Inc, mc68hc05j1avp Datasheet - Page 45

• Manufacturer Part Number: mc68hc05j1avp
• Description: M68hc05 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

4.3.2.3 IRQ Status and Control Register
MC68HC05J1A — Rev. 3.0
MOTOROLA
Address:
The IRQ status and control register (ISCR), shown in
contains an external interrupt mask, an external interrupt flag, and a flag
reset bit.
IRQE — External Interrupt Request Enable Bit
IRQF — External Interrupt Request Flag
IRQR — Interrupt Request Reset Bit
Reset:
Read:
Write:
This read/write bit enables external interrupts. Resets set the IRQE
bit.
The IRQ flag is a clearable, read-only bit that is set when an external
interrupt request is pending. Resets clear the IRQF bit.
These conditions set the IRQ flag:
The CPU clears the IRQ flag when fetching the interrupt vector.
Writing to the IRQ flag has no effect. Clear the IRQ flag by writing a
logic 1 to the IRQR bit.
This write-only bit clears the IRQ flag.
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1 = External interrupt processing enabled
0 = External interrupt processing disabled
1 = Interrupt request pending
0 = No interrupt request pending
1 = IRQF bit cleared
0 = No effect
a. An external interrupt signal on the IRQ pin
b. An external interrupt signal on pin PA3, PA2, PA1, or PA0
Figure 4-2. IRQ Status and Control Register (ISCR)
$000A
IRQE
Bit 7
1
when PA3–PA0 are enabled to serve as external interrupt
sources
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= Unimplemented
IRQF
6
0
Interrupts
5
0
0
4
0
0
3
0
0
2
0
0
Figure
Interrupt Sources
IRQR
1
0
Technical Data
4-2,
Interrupts
Bit 0
0
0
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