mpc850de Freescale Semiconductor, Inc, mpc850de Datasheet - Page 36
mpc850de
Manufacturer Part Number
mpc850de
Description
Mpc850 Rev. A/b/c Communications Controller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MPC850DE.pdf
(68 pages)
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Layout Practices
Table 11 shows the reset timing for the MPC850.
Figure 31 shows the reset timing for the data bus configuration.
36
Num
CLKOUT to HRESET high impedance
CLKOUT to SRESET high impedance
RSTCONF pulse width
Configuration data to HRESET rising
edge set up time
Configuration data to RSTCONF rising
edge set up time
Configuration data hold time after
RSTCONF negation
Configuration data hold time after
HRESET negation
HRESET and RSTCONF asserted to
data out drive
RSTCONF negated to data out high
impedance.
CLKOUT of last rising edge before chip
tristates HRESET to data out high
impedance.
DSDI, DSCK set up
DSDI, DSCK hold time
SRESET negated to CLKOUT rising
edge for DSDI and DSCK sample
Characteristic
Figure 31. Reset Timing—Configuration from Data Bus
MPC850 (Rev. A/B/C) Hardware Specifications
Table 11. Reset Timing
340.00
350.00
350.00
160.00
60.00
0.00
0.00
0.00
Min
—
—
—
—
—
—
50 MHz
20.00
20.00
25.00
25.00
25.00
Max
—
—
—
—
—
—
—
—
—
515.00
505.00
350.00
242.00
90.00
0.00
0.00
0.00
Min
—
—
—
—
—
—
66MHz
20.00
20.00
25.00
25.00
25.00
Max
—
—
—
—
—
—
—
—
—
425.00
425.00
350.00
200.00
75.00
0.00
0.00
0.00
Min
—
—
—
—
—
—
80 MHz
20.00
20.00
25.00
25.00
25.00
Max
—
—
—
—
—
—
—
—
—
FFACTOR Unit
17.000
15.000
3.000
8.000
MOTOROLA
—
—
—
—
—
—
—
—
—
—
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns