mpc5602d Freescale Semiconductor, Inc, mpc5602d Datasheet - Page 62

no-image

mpc5602d

Manufacturer Part Number
mpc5602d
Description
Mpc5602d Microcontroller Data Sheet
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Electrical characteristics
4.18.2
62
1
2
3
No.
10
11
12
1
2
3
4
5
6
9
Operating conditions: C
Maximum is reached when CSn pad is configured as SLOW pad while SCK pad is configured as MEDIUM pad.
The t
in DSPI_CTARx registers), delay between internal CS and internal SCK must be higher than t
positive t
CSC
t
t
CSCext
ASCext
t
t
t
t
DSPI characteristics
f
t
t
SUO
HO
DSPI
t
SCK
SDC
Symbol
t
SUI
t
CSC
t
ASC
DI
HI
A
CSCext
delay value is configurable through a register. When configuring t
(6)
6
3
4
.
SR D SCK cycle time
SR D DSPI digital controller frequency
CC D Internal delay between pad
CC D Internal delay between pad
SR D CS to SCK delay
SR D After SCK delay
CC D SCK duty cycle
SR D
SR D Slave access time
SR D Slave SOUT disable time
SR D Data setup time for inputs
SR D Data hold time for inputs
CC D Data valid after SCK edge
CC D Data hold time for outputs
C
D
D
D
OUT
associated to SCK and pad
associated to CSn in master
mode
associated to SCK and pad
associated to CSn in master
mode for CSn11
= 10 to 50 pF, Slew
Preliminary—Subject to Change Without Notice
MPC5602D Microcontroller Data Sheet, Rev. 3.1
Table 40. DSPI characteristics
Parameter
IN
= 3.5 to 15 ns.
Master mode
(MTFE = 0)
Slave mode
(MTFE = 0)
Master mode
(MTFE = 1)
Slave mode
(MTFE = 1)
Master mode
Master mode
Slave mode
Slave mode
Master mode
Slave mode
Master mode
Slave mode
Master mode
Slave mode
Master mode
Slave mode
Master mode
Slave mode
1
CSC
1/f
1/f
(using PCSSCK and CSSCK fields
DSPI
t
DSPI
SCK
Min
125
125
83
83
32
43
2
7
5
0
0
8
5
/2
DSPI0/DSPI1
+ 70
+ 5
t
SCK
Typ
Freescale Semiconductor
CSC
/2
to ensure
130
130
Max
f
CPU
32
52
(2)
2
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

Related parts for mpc5602d