mpc2106bsg66 Freescale Semiconductor, Inc, mpc2106bsg66 Datasheet - Page 11

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mpc2106bsg66

Manufacturer Part Number
mpc2106bsg66
Description
512kb And 1mb Burstramtm Secondary Cache Modules For Powerpctm Prep/chrp Platforms
Manufacturer
Freescale Semiconductor, Inc
Datasheet
RESET FUNCTION TRUTH TABLE
NOTES:
READ FUNCTION TRUTH TABLE
WRITE FUNCTION TRUTH TABLE
NOTES:
MATCH FUNCTION TRUTH TABLE
NOTES:
MOTOROLA FAST SRAM
1. H = V IH , L = V IL , X = don‘t care, — = undefined.
2. TG is X for this table.
3. These are output states.
1. H = V IH , L = V IL , X = don‘t care, — = undefined.
2. This table applies when RESET and PWRDN are high.
3. D out in this case is the same as D in . The input data is written through to the outputs during the write operation.
1. H = V IH , L = V IL , X = don‘t care, — = undefined.
2. M = high if TAG in equals the memory contents at the address; M = low if TAG in does not equal the contents at that address.
3. PWRDN and RESET are high for this table. GS and CLK are X.
4. This column represents the stored memory cell data for the given status bit at the selected address.
TCLR
TG
TG
TG
H
X
H
H
H
L
H
L
L
L
L
TWE
TWE
TWE
H
X
H
H
H
X
L
L – H
L – H
L
L
CLK
TAG0 – TAG11
CLK
L – H
L – H
CLK
X
X
TAG in
TAG in
TWE
D out
D in
H
L
TAG0 – TAG11
TAG0 – TAG11
(See Notes 1, 2, and 3)
(See Notes 1 and 2)
(See Notes 1 and 2)
(See Notes 1 through 4)
High–Z
TAG0 – TAG11
D out
D in
VALIDIN (4)
High–Z
D in
H
L
VALIDIN
VALIDIN
DIRTYIN (4)
DIRTYOUT
TAG RAM
D in
L (3)
DIRTYIN
DIRTYIN
MATCH
MPC2105A•MPC2106A•MPC2105B•MPC2106B
D out
MATCH
H
L
L
L
L (3)
DIRTYOUT
DIRTYOUT
D out
Invalid Data – Dedicated Status Bits
Reset Status
Not Allowed
Operation
MATCH
Match – Dedicated Status Bits
MATCH
D out
Write Tag I/O, Status Bits
L
Read Tag I/O
Operation
Selected
Tag I/O Disable
Read Tag I/O
Write Tag I/O
Not Allowed
Operation
Operation
POWER
Active
11

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