lan9420 Standard Microsystems Corp., lan9420 Datasheet - Page 49

• Manufacturer Part Number: lan9420
• Description: Lan9420/lan9420i Single-chip Ethernet Controller With Hp Auto-mdix Support And Pci Interface
• Manufacturer: Standard Microsystems Corp.

Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface
Datasheet
SMSC LAN9420/LAN9420i
BITS
10:0
BITS
31:0
BITS
31:0
Transmit Descriptor 2 (TDES2)
Transmit Descriptor 3 (TDES3)
TBS1 - Transmit Buffer 1 Size
Indicates the size, in bytes, of the first data buffer. If this field is 0, the DMA controller ignores this
buffer and uses buffer2.
Host Actions: Initializes this field.
DMAC Actions: Reads this field to determine the allocated size of associated data buffer.
Buffer 1 Address Pointer
This is the physical address of buffer 1. There are no limitations on the buffer address alignment.
Host Actions: Initializes this field.
DMAC Actions: Reads this field upon opening a new DMA descriptor to obtain the buffer
address.
Buffer 2 Address Pointer (Next Descriptor Address)
The TCH (Second Address Chained) bit (TDES1[24]) determines the usage of this field as
follows:
TCH is zero: This field contains the pointer to the address of buffer 2 in Host memory. There
are no limitations on buffer address alignment.
TCH is one: Descriptor chaining is in use and this field contains the pointer to the next
descriptor in Host memory. The descriptor must be 4-DWORD (16-byte) aligned (TDES3[3:0] =
0000b). In the case where the buffer is not 4-DWORD aligned, the resulting behavior is
undefined.
Note:
Host Actions: Initializes this field.
DMAC Actions: Reads this field upon opening a new DMA descriptor to obtain the buffer
address.
If TER (TDES1[25]) is set, TCH is ignored and this field is treated as a pointer to buffer
2 as in the “TCH is zero” case above.
Table 3.10 TDES1 Bit Fields (continued)
Table 3.11 TDES2 Bit Fields
Table 3.12 TDES3 Bit Fields
DATASHEET
49
DESCRIPTION
DESCRIPTION
DESCRIPTION
Revision 1.1 (03-31-08)