lan9420 Standard Microsystems Corp., lan9420 Datasheet - Page 58

• Manufacturer Part Number: lan9420
• Description: Lan9420/lan9420i Single-chip Ethernet Controller With Hp Auto-mdix Support And Pci Interface
• Manufacturer: Standard Microsystems Corp.

Revision 1.1 (03-31-08)
Reserved
BITS
BITS
30:0
2:1
31
3
0
Filter 3 Offset
The Filter i Byte Mask defines which incoming frame bytes Filter i will examine to determine whether
or not this is a wakeup frame.
The Filter i command register controls Filter i operation.
register.
The Filter i Offset register defines the offset in the frame’s destination address field from which the
frames are examined by Filter i.
DESCRIPTION
RESERVED
Byte Mask: If bit j of the byte mask is set, the CRC machine processes byte pattern-offset + j of
the incoming frame. Otherwise, byte pattern-offset + j is ignored.
DESCRIPTION
Address Type: Defines the destination address type of the pattern. When bit is set, the pattern
applies only to multicast frames. When bit is cleared, the pattern applies only to unicast frames.
RESERVED
Enable Filter: When bit is set, Filter i is enabled, otherwise, Filter i is disabled.
Command
Filter 3
Filter 1 CRC-16
Filter 3 CRC-16
Table 3.14 Wakeup Frame Filter Register Structure
Reserved
Table 3.15 Filter i Byte Mask Bit Definitions
Table 3.16 Filter i Command Bit Definitions
Filter 2 Offset
FILTER i BYTE MASK DESCRIPTION
Table
Command
FILTER i COMMANDS
Table 3.17
Filter 2
Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface
Filter 0 Byte Mask
Filter 1 Byte Mask
Filter 2 Byte Mask
Filter 3 Byte Mask
DATASHEET
3.15, describes the byte mask’s bit fields.
58
describes the Filter i Offset bit fields.
Reserved
Filter 1Offset
Command
Table 3.16
Filter 1
Filter 0 CRC-16
Filter 2 CRC-16
shows the Filter I command
Reserved
SMSC LAN9420/LAN9420i
Filter 0 Offset
Command
Filter 0
Datasheet