w83877atd Winbond Electronics Corp America, w83877atd Datasheet - Page 116
w83877atd
Manufacturer Part Number
w83877atd
Description
Winbond I/o
Manufacturer
Winbond Electronics Corp America
Datasheet
1.W83877ATD.pdf
(191 pages)
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This bit enables or disables three mode FDD selection. When this bit is high, it enables the read/write
3F3H register.
When three mode FDD function is enabled, the value of RWC depends on bit 5 and bit 4 of
TDR(3F3H). The values of RWC and their meaning are shown in Table 8-4.
Table 8-4
Bit 4: Reserved.
CHIP ID 3, CHIP ID 2, CHIP ID 1, CHIP ID 0 (Bit 3-bit 0):
These four bits are read-only bits that contain chip identification information. The value is 0DH for
W83877ATF during a read.
8.2.11 Configuration Register A (CR0A),
When the device is in Extended Function mode and EFIR is 0AH, the CRA register can be accessed
through EFDR. This register is reserved.
8.2.12 Configuration Register B (CR0B), default = 0CH
When the device is in Extended Function mode and EFIR is 0BH, the CRB register can be accessed
through EFDR. The bit definitions are as follows:
BIT 5 OF TDR
0
1
0
0
1
1
Disables 3 mode FDD selection
Enables 3 mode FDD selection
BIT 4 OF TDR
0
1
0
1
7
6
5
4
default = 00H
Normal
RWC
3
X
0
1
- 112 -
2
1
0
1.2 M FDD
RWC = 0
250K bps
DRV2EN
INVERTZ
IDENT
ENIFCHG
MFM
RXW4C
TXW4C
reserved
X
X
Publication Release Date: April 1998
W83877ATF
500K bps
RWC = 1
1.4M FDD
X
X
Version 0.51
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