w83977atg Winbond Electronics Corp America, w83977atg Datasheet - Page 70
w83977atg
Manufacturer Part Number
w83977atg
Description
W83877tf Plus Kbc, Gp I/o, Wake-up, Fir, Cir, Pb-free
Manufacturer
Winbond Electronics Corp America
Datasheet
1.W83977ATG.pdf
(198 pages)
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7.4
These registers are only used in advanced modes.
7.4.1
These two registers are the same as legacy IR baud rate divisor latch in SET 1.Reg0~1. In advanced
SIR/ASK-IR mode, the user should program these registers to set baud rate. This is to prevent
backward operations from occurring.
7.4.2
Bit 7:
Bit 6:
Bit 5:
Advanced IR
Reset Value
ADDRESS OFFSET
MODE
Set2 - Interrupt Status or IR FIFO Control Register (ISR/UFR)
Reg0, 1 - Advanced Baud Rate Divisor Latch (ABLL/ABHL)
Reg2 - Advanced IR Control Register 1 (ADCR1)
0
1
2
3
4
5
6
7
BR_OUT - Baud Rate Clock Output
When written to 1, the programmed baud rate clock will be output to DTR pin. This bit is
only used to test baud rate divisor.
Reserved, write 0.
EN_LOUT - Enable Loopback Output
A write to 1 will enable transmitter to output data to IRTX pin when loopback operation
occurs. Internal data can be verified through an output pin by setting this bit.
BR_OUT
BIT 7
0
REGISTER NAME
BIT 6
0
-
Reserved
RXFDTH
TXFDTH
ADCR1
ADCR2
ABHL
ABLL
SSR
EN_LOUT
BIT 5
0
- 62 -
ALOOP
BIT 4
Advanced Baud Rate Divisor Latch (Low Byte)
Advanced Baud Rate Divisor Latch (High Byte)
Advanced IR Control Register 1
Sets Select Register
Advanced IR Control Register 2
Transmitter FIFO Depth
Receiver FIFO Depth
0
W83977ATF/W83977ATG
D_CHSW
BIT 3
REGISTER DESCRIPTION
0
DMATHL
BIT 2
0
-
DMA_F
BIT 1
0
ADV_SL
BIT 0
0
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