sae81c90 Infineon Technologies Corporation, sae81c90 Datasheet - Page 19

• Manufacturer Part Number: sae81c90
• Description: Standalone Full-can Controller
• Manufacturer: Infineon Technologies Corporation

Control Register
CTRL
Address: 12
Reset Value: 00
Bit(field)
MM
TCE
SME
TSOV
TSP
TST
RX
Semiconductor Group
H
H
Function
Monitor Mode
’0’:
’1’:
Transmit Check Enable
’0’:
’1’:
Sleep Mode Enable
’0’:
’1’:
Time Stamp Overflow
’0’:
’1’:
Time Stamp Prescaler (Defines the input clock of the time-stamp timer)
’00’:
’01’:
’10’:
’11’:
Time Stamp Test
’0’:
’1’:
Input Monitor RX
This bit monitors the actual state of the digital input pin RX0.
Message object 0 operates like all other objects.
Message object 0 receives all identifiers that are not accepted
by other objects (corresponds to a Basic CAN receive register).
If the transmit check detects an error, there is no intervention.
If the transmit check detects an error, the message is invalidated by an
error frame and the error counter TCEC is incremented by 1.
If the counter reaches 4, the Bus Off status is initiated and, if enabled, an
interrupt (TCI) is generated.
Normal operation.
The sleep mode is enabled: the crystal oscillator is deactivated, all other
activities are inhibited.
The wake up is done by a reset signal or by an active signal at the CS pin
or by an input edge going from recessive to dominant at pin Rx0 or Rx1.
There has been no overflow
There was at least one overflow of the time-stamp timer.
f
f
f
f
The prescaler is activated.
The time-stamp prescaler is deactivated.
(Only for testing purposes, bit IM = MOD.0 must be set to ’1’).
RX
BL
BL
BL
BL
rw
7
07Feb95@09:05h Intermediate Version
/ 32
/ 64
/ 128
/ 256 (For
TST
rw
6
f
BL
see baud-rate prescaler BRP).
rw
5
TSP
18
rw
4
TSOV
rw
3
SME
rw
2
SAE 81C90/91
TCE
rw
1
MM
rw
0