tef6892h-v2 NXP Semiconductors, tef6892h-v2 Datasheet - Page 26
tef6892h-v2
Manufacturer Part Number
tef6892h-v2
Description
Car Radio Integrated Signal Processor
Manufacturer
NXP Semiconductors
Datasheet
1.TEF6892H-V2.pdf
(59 pages)
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Philips Semiconductors
11.1.3
Table 9 Format of data byte 3
Table 10 Description of data byte 3
11.1.4
Table 11 Format of data byte 4
Table 12 Description of data byte 4
11.1.5
Table 13 Format of data byte 5
Table 14 Description of data byte 5
11.1.6
Table 15 Format of data byte 6
Table 16 Description of data byte 6
2003 Oct 21
Car radio integrated signal processor
1 and 0
SYNC
USN3
BIT 7
7 to 4
3 to 0
BIT 7
4 to 2
BIT 7
LM15
7 to 0
BIT 7
7 to 0
LM7
BIT
BIT
BIT
BIT
7
6
5
D
D
D
D
ATA BYTE
ATA BYTE
ATA BYTE
ATA BYTE
SYMBOL
WAM[3:0]
SYMBOL
SYMBOL
SYMBOL
USN[3:0]
LM[15:8]
ELB[1:0]
LBI[2:0]
LM[7:0]
SYNC
USN2
DOFL
DOFL
RSTD
BIT 6
BIT 6
BIT 6
LM14
BIT 6
3; USN
4; RDS STATUS
5; RDS LDATM
6; RDS LDATL
LM6
AND
Ultrasonic noise detector. USN content of the MPXRDS audio signal; see Fig.5.
Wideband AM detector. WAM content of the LEVEL voltage; see Fig.6.
Synchronization found status. 0 = synchronization is searched. 1 = synchronization
found.
Data overflow flag. 0 = normal operation. 1 = data overflow is detected (no update).
Reset detected. 0 = normal operation. 1 = decoder reset (POR) is in progress.
Last block identification. See Table 25.
Error status last block. See Table 26.
Block data of previously received RDS block, most significant byte.
Block data of previously received RDS block, least significant byte.
WAM
USN1
RSTD
BIT 5
BIT 5
BIT 5
LM13
BIT 5
LM5
USN0
BIT 4
BIT 4
BIT 4
LM12
BIT 4
LBI2
LM4
26
WAM3
BIT 3
BIT 3
BIT 3
LM11
BIT 3
LBI1
LM3
DESCRIPTION
DESCRIPTION
DESCRIPTION
DESCRIPTION
WAM2
BIT 2
BIT 2
BIT 2
LM10
BIT 2
LBI0
LM2
WAM1
BIT 1
BIT 1
ELB1
BIT 1
BIT 1
LM9
LM1
Product specification
TEF6892H
WAM0
BIT 0
BIT 0
ELB0
BIT 0
BIT 0
LM8
LM0
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