cat34ac02pa-te13 Catalyst Semiconductor, cat34ac02pa-te13 Datasheet
cat34ac02pa-te13
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cat34ac02pa-te13 Summary of contents
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... Write Protect V +1.8V to +6.0V Power Supply CC V Ground SS © 2003 by Catalyst Semiconductor, Inc. Characteristics subject to change without notice Self-timed write cycle with auto-clear 1,000,000 program/erase cycles 100 year data retention 8-pin DIP, 8-pin SOIC and 8-pin TSSOP packages 256 x 8 memory organization Hardware write protect 16-byte page write buffer ...
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ABSOLUTE MAXIMUM RATINGS* Temperature Under Bias Storage Temperature ....................... – +150 C Voltage on Any Pin with (1) Respect to Ground ........... –2. with Respect to Ground ............... –2.0V to +7.0V CC Package Power Dissipation ...
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A.C. CHARACTERISTICS V = +1.8V to +6.0V, unless otherwise specified. CC Read & Write Cycle Limits ...
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... A maximum of eight devices can be cascaded when using the device. WP: Write Protect This input, when tied to GND, allows write operations to the entire memory. For CAT34AC02 when this pin is tied the entire array of memory is write protected. CC When left floating, memory is unprotected. ...
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SERIAL BUS PROTOCOL The following defines the features of the ACR Serial bus protocol: (1) Data transfer may be initiated only when the bus is not busy. (2) During a data transfer, the data line must remain stable whenever the ...
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... WRITE PROTECTION The write protection feature of CAT34AC02 allows the user to protect against inadvertent programming of the memory array. If the WP pin is tied to Vcc, the entire memory array is protected and becomes read only. If the WP pin is left floating or tied to Vss, the device can be written into. ...
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... N+1. The READ operation address counter increments all of the CAT34AC02 address bits so that the entire memory array can be read during one operation. If more than the 256 bytes are read out, the counter will “wrap around” and continue to clock out data bytes ...
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... Figure 9. Memory Array Figure 10. Selective Read Timing BUS ACTIVITY: SLAVE R MASTER ADDRESS T SDA LINE S Figure 11. Sequential Read Timing BUS ACTIVITY: SLAVE MASTER ADDRESS SDA LINE Doc. No. 1025, Rev. E FFH Hardware Write Protectable (by connecting WP pin to Vcc) 00H BYTE SLAVE ...
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ORDERING INFORMATION Prefix Device # CAT 34AC02 Optional Product Company ID Number Package P: PDIP J: SOIC (JEDEC) U: TSSOP R: MSOP L: PDIP (Lead free, Halogen free) W: SOIC (Lead free, Halogen free) Y: TSSOP (Lead free, Halogen free) ...
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... Catalyst Semiconductor products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Catalyst Semiconductor product could create a situation where personal injury or death may occur. ...