74ACT18823MTD Fairchild Semiconductor, 74ACT18823MTD Datasheet
74ACT18823MTD
Specifications of 74ACT18823MTD
Related parts for 74ACT18823MTD
74ACT18823MTD Summary of contents
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... MS56A 56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300” Wide 74ACT18823MTD MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. ...
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Functional Description The ACT18823 consists of eighteen D-type edge-triggered flip-flops. These have 3-STATE outputs for bus systems organized with inputs and outputs on opposite sides. The device is byte controlled with each byte functioning identi- cally, but independent of the ...
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Absolute Maximum Ratings Supply Voltage ( Input Diode Current ( 0. 0. Output Diode Current ( 0. 0. Output ...
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AC Electrical Characteristics Symbol Parameter f Maximum Clock MAX Frequency t Propagation Delay PHL PLH Propagation Delay PHL CLR Output Enable Time PZL t PZH t Output Disable ...
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Physical Dimensions inches (millimeters) unless otherwise noted 56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300” Wide Package Number MS56A 5 www.fairchildsemi.com ...
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves ...