tmp88ph40mg TOSHIBA Semiconductor CORPORATION, tmp88ph40mg Datasheet - Page 88
tmp88ph40mg
Manufacturer Part Number
tmp88ph40mg
Description
8 Bit Microcontroller
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP88PH40MG.pdf
(158 pages)
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11.5.1.2 Commutation control circuit
PWM synchronizing clock
contents set in this register are divided into two, one for selecting the synchronizing signal for port output,
and one for setting up port output. The synchronizing signal can be selected from Timers 1 or 2, position
detection signal, or without sync. Port output can be synchronized to this synchronizing signal before
being further synchronized to the PWM signal sync. The MDOUT Register's synchronizing signal select
bit becomes effective immediately after writing. Other bits are dual-buffered, and are updated by the
selected synchronizing signal.
MDCRA Register bits 5 and 4. Furthermore, the U, V, and W phases can individually be selected between
PWM output and H/L output by using the MDOUT Register bits A to 8 and 5 to 0. When PWM output is
selected, PWM waveforms are output; when H/L output is selected, a waveform which is fixed high or
low is output. The MDOUT Register bits E to C set the expected position signal value for the position
detection circuit.
fc/2
Output ports are controlled depending on the contents set in the PMD Output Register (MDOUT). The
Example: Commutation timing for one timer period with PWM synchronization specified
Output on six ports can be set to be active high or active low independently of each other by using the
PMD period register
PMD compare register
MDPRD
CMPW
CMPU
CMPV
B to 0
B to 0
B to 0
B to 0
INTTMR
PWM
Commutation
Clock selector
Figure 11-10 Pulse Width Modulation Circuit
MDCRB
1 to 0
control
PWM
Selector/
Selector/
Buffer W
Buffer U
Buffer V
Latch
Latch
Up/Down
7 6
PWM control register
Page 78
MDCRA
−
3
−
MDCNT
B to 0
3, 2, 1
PWM counter
0
Three-phase
Three-phase
common/
PWM interrupt
INTPWM
Stop MDCNT
PWMU
PWMV
PWMW
TMP88PH40MG
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