w79e532 Winbond Electronics Corp America, w79e532 Datasheet - Page 16

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w79e532

Manufacturer Part Number
w79e532
Description
8-bit Microcontroller
Manufacturer
Winbond Electronics Corp America
Datasheet

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REN:
TB8:
RB8:
TI:
RI:
Serial Data Buffer
SBUF.7-0: Serial data on the serial port 0 is read from or written to this location. It actually consists of
P4.2 Base Address Low Byte Register
P4.2 Base Address High Byte Register
P4.3 Base Address Low Byte Register
P4.3 Base Address High Byte Register
compatibility with the standard 8052. When set to 1, the serial clock become divide by 4 of the
oscillator clock. This results in faster synchronous serial communication.
This is the 9th bit to be transmitted in modes 2 and 3. This bit is set and cleared by software
as desired.
In modes 2 and 3 this is the received 9th data bit. In mode 1, if SM2 = 0, RB8 is the stop bit
that was received. In mode 0 it has no function.
Transmit interrupt flag: This flag is set by hardware at the end of the 8th bit time in mode 0, or
at the beginning of the stop bit in all other modes during serial transmission. This bit must be
cleared by software.
Receive interrupt flag: This flag is set by hardware at the end of the 8th bit time in mode 0, or
halfway through the stop bits time in the other modes during serial reception. However the
restrictions of SM2 apply to this bit. This bit can be cleared only by software.
Receive enable: When set to 1 serial reception is enabled, otherwise reception is disabled.
two separate internal 8-bit registers. One is the receive resister, and the other is the
transmit buffer. Any read access gets data from the receive data buffer, while write access
is to the transmit data buffer.
Mnemonic: P43AL
Mnemonic: P43AH
Mnemonic: P42AL
Mnemonic: P42AH
Mnemonic: SBUF
Bit:
Bit:
Bit:
Bit:
Bit:
SBUF.7 SBUF.6 SBUF.5 SBUF.4 SBUF.3 SBUF.2 SBUF.1 SBUF.0
A15
A15
A7
A7
7
7
7
7
7
A14
A14
A6
A6
6
6
6
6
6
A13
A13
A5
A5
- 16 -
5
5
5
5
5
A12
A12
A4
A4
4
4
4
4
4
A11
A11
W79E532/W79L532
A3
A3
3
3
3
3
3
Address: 9Ah
Address: 9Bh
Address: 9Ch
Address: 9Dh
Address: 99h
A10
A10
A2
A2
2
2
2
2
2
A1
A9
A1
A9
1
1
1
1
1
A0
A8
A0
A8
0
0
0
0
0

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