wm8952 Wolfson Microelectronics plc, wm8952 Datasheet - Page 43

• Manufacturer Part Number: wm8952
• Description: Mono Adc With Microphone Pre-amplifier
• Manufacturer: Wolfson Microelectronics plc

Pre Production
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MASTER CLOCK AND PHASE LOCKED LOOP (PLL)
The PLL is enabled or disabled by the PLLEN register bit.
Note: In order to minimise current consumption, the PLL is disabled when the VMIDSEL[1:0] bits are
set to 00b. VMIDSEL[1:0] must be set to a value other than 00b to enable the PLL.
Table 32 PLLEN Control Bit
Figure 24 PLL and Clock Select Circuit
The WM8952 has an on-chip phase-locked loop (PLL) circuit that can be used to:
Table 32 shows the PLL and internal clocking arrangement on the WM8952.
R1
Power
Management 1
•
•
REGISTER
ADDRESS
Generate master clocks for the WM8952 audio functions from another external clock, e.g.
in telecoms applications.
Generate an output clock, on GPIO, for another part of the system (derived from an
existing audio master clock).
5
BIT
PLLEN
LABEL
0
DEFAULT
PLL enable
0=PLL off
1=PLL on
DESCRIPTION
PP, Rev 3.0, December 2008
WM8952
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