adum3220 Analog Devices, Inc., adum3220 Datasheet - Page 12
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adum3220
Manufacturer Part Number
adum3220
Description
4 A Dual-channel Gate Driver Adum3220
Manufacturer
Analog Devices, Inc.
Datasheet
1.ADUM3220.pdf
(16 pages)
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Part Number
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Manufacturer:
ADI/亚德诺
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ADuM3220
DC CORRECTNESS AND MAGNETIC FIELD IMMUNITY
Positive and negative logic transitions at the isolator input cause
narrow (~1 ns) pulses to be sent to the decoder via the transformer.
The decoder is bistable and is, therefore, either set or reset by
the pulses, indicating input logic transitions. In the absence of
logic transitions of more than 2 μs at the input, a periodic set of
refresh pulses indicative of the correct input state are sent to
ensure dc correctness at the output.
If the decoder receives no internal pulses for more than about
5 μs, the input side is assumed to be unpowered or nonfunc-
tional, in which case, the isolator output is forced to a default
low state by the watchdog timer circuit. In addition, the outputs
are in a low default state while the power is coming up before
the UVLO threshold is crossed.
The ADuM3220 is immune to external magnetic fields. The
limitation on the ADuM3220 magnetic field immunity is set
by the condition in which induced voltage in the transformer
receiving coil is sufficiently large to either falsely set or reset
the decoder. The following analysis defines the conditions
under which this can occur. The 3 V operating condition of
the ADuM3220 is examined because it represents the most
susceptible mode of operation. The pulses at the transformer
output have an amplitude greater than 1.0 V. The decoder has a
sensing threshold at about 0.5 V, therefore establishing a 0.5 V
margin in which induced voltages can be tolerated. The voltage
induced across the receiving coil is given by
where:
β is the magnetic flux density (gauss).
N is the number of turns in the receiving coil.
r
Given the geometry of the receiving coil in the ADuM3220
and an imposed requirement that the induced voltage is at
most 50% of the 0.5 V margin at the decoder, a maximum
allowable magnetic field is calculated, as shown in Figure 19.
n
is the radius of the nth turn in the receiving coil (cm).
V = (−dβ/dt) ∑π r
V
Figure 18. RLC Model of the Gate of an N-Channel MOSFET
IA
ADuM3220
n
2
, n = 1, 2, ... , N
V
OA
R
SW
L
TRACE
R
GATE
C
GS
VO
Rev. 0 | Page 12 of 16
For example, at a magnetic field frequency of 1 MHz, the maxi-
mum allowable magnetic field of 0.2 kgauss induces a voltage
of 0.25 V at the receiving coil. This is about 50% of the sensing
threshold and does not cause a faulty output transition. Similarly,
if such an event were to occur during a transmitted pulse (and
had the worst-case polarity), the received pulse is reduced from
>1.0 V to 0.75 V, still well above the 0.5 V sensing threshold of
the decoder.
The preceding magnetic flux density values correspond to
specific current magnitudes at given distances away from the
ADuM3220 transformers. Figure 20 expresses these allowable
current magnitudes as a function of frequency for selected
distances. As shown, the ADuM3220 is immune and only can
be affected by extremely large currents operated at a high
frequency and very close to the component. For the 1 MHz
example, one would have to place a 0.5 kA current 5 mm away
from the ADuM3220 to affect the component’s operation.
0.001
1000
0.01
0.01
Figure 19. Maximum Allowable External Magnetic Flux Density
100
100
0.1
0.1
10
10
1
1
1k
1k
Figure 20. Maximum Allowable Current for Various
DISTANCE = 100mm
10k
DISTANCE = 5mm
Current-to-ADuM3220 Spacings
10k
MAGNETIC FIELD FREQUENCY (Hz)
MAGNETIC FIELD FREQUENCY (Hz)
100k
100k
1M
1M
DISTANCE = 1m
10M
10M
100M
100M