ak4673 AKM Semiconductor, Inc., ak4673 Datasheet - Page 34

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ak4673

Manufacturer Part Number
ak4673
Description
Stereo Codec With Mic/hp-amp And Touch Screen Controller
Manufacturer
AKM Semiconductor, Inc.
Datasheet
The AK4673 becomes EXT master mode by setting PMPLL bit = “0” and M/S bit = “1”. Master clock is input from
MCKI pin, the internal PLL circuit is not operated. The clock required to operate is MCKI (256fs, 512fs or 1024fs). The
input frequency of MCKI is selected by FS1-0 bits
The S/N of the DAC at low sampling frequencies is worse than at high sampling frequencies due to out-of-band noise.
The out-of-band noise can be reduced by using higher frequency of the master clock. The S/N of the DAC output through
LOUT/ROUT pins at fs=8kHz is shown in
MCKI should always be present whenever the ADC or DAC is in operation (PMADL bit = “1”, PMADR bit = “1” or
PMDAC bit = “1”). If MCKI is not provided, the AK4673 may draw excess current and it is not possible to operate
properly because utilizes dynamic refreshed logic internally. If MCKI is not present, the ADC and DAC should be in the
power-down mode (PMADL=PMADR=PMDAC bits = “0”).
MS0670-E-01
EXT Master Mode (PMPLL bit = “0”, M/S bit = “1”)
Mode
0
1
2
3
Table 14. MCKI Frequency at EXT Master Mode (PMPLL bit = “0”, M/S bit = “1”) (x: Don’t care)
FS3-2 bits
x
x
x
x
Table 15. Relationship between MCKI and S/N of LOUT/ROUT pins
AK4673
Table 16. BICK Output Frequency at Master Mode
1024fs
MCKI
FS1 bit
256fs
512fs
BCKO bit
MCKO
MCKI
BICK
LRCK
SDTO
SDTI
0
0
1
1
0
1
Table
Figure 23. EXT Master Mode
(fs=8kHz, 20kHzLPF + A-weighted)
FS0 bit
15.
256fs, 512fs or 1024fs
(Table
0
1
0
1
BICK Output
32fs or 64fs
Frequency
- 34 -
14).
1fs
32fs
64fs
MCKI Input
83dB
93dB
93dB
Frequency
S/N
1024fs
256fs
256fs
512fs
MCLK
BCLK
LRCK
SDTI
SDTO
(default)
DSP or μP
Sampling Frequency
7.35kHz ∼ 48kHz
7.35kHz ∼ 13kHz
7.35kHz ∼ 48kHz
7.35kHz ∼ 26kHz
Range
(default)
[AK4673]
2007/10

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