ak4671 AKM Semiconductor, Inc., ak4671 Datasheet - Page 97

no-image

ak4671

Manufacturer Part Number
ak4671
Description
Stereo Codec With Mic/rcv/hp-amp
Manufacturer
AKM Semiconductor, Inc.
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ak4671EG-L
Manufacturer:
NXP
Quantity:
8 122
When LODIF bit = “1”, LOUT3/ROUT3 pins become LOP/LON pins, respectively. Lch/Rch signal of DAC or
LIN1/RIN1/LIN2/RIN2/LIN3/RIN3/LIN4/RIN4 is output from the LOP/LON pins which is full-differential as (L+R)
signal. The load impedance is 10k Ω (min) for LOP and LON pins, respectively. When the PMLO3 = PMRO3 bits = “0”,
the mono line output enters power-down mode and the output is pulled-down to VSS1. When the PMLO3 = PMRO3 bits
= “1” and LOPS3 bit = “1”, mono line output enters power-save mode. Pop noise at power-up/down can be reduced by
changing PMLO3 and PMRO3 bits at LOPS3 bit = “0”. When PMLO3 = PMRO3 bits = “1” and LOPS3 bit = “0”, mono
line output enters in normal operation. L3VL1-0 bits set the volume of mono line output.
<Full-differential Mono Line Output Control Sequence (in case of using Pop Noise Reduction
Circuit)>
MS0666-E-00
Full-differential Mono Line Output (LOP/LON pins)
(1) Set LOPS3 bit = “1”. Mono line output enters the power-save mode.
(2) Set PMLO3 = PMRO3 bits = “1”. Mono line output exits the power-down mode.
(3) Set LOPS3 bit = “0” after LOP and LON pins rise up. Mono line output exits the power-save mode.
(4) Set LOPS3 bit = “1”. Mono line output enters power-save mode.
(5) Set PMLO3 = PMRO3 bits = “0”. Mono line output enters power-down mode.
(6) Set LOPS3 bit = “0” after LOP and LON pins fall down. Mono line output exits the power-save mode.
P M L O 3 b it
P M R O 3 b it
L O P S 3 b it
L O P , L O N p in s
Figure 79. Mono Line Output 3 Control Sequence (in case of using Pop Noise Reduction Circuit)
LOP and LON pins rise up to VCOM voltage. Rise time is 200ms (max 300ms) at C=1 μ F and AVDD=3.3V.
Mono line output is enabled.
LOP and LON pins fall down to VSS1. Fall time is 200ms (max 300ms) at C=1 μ F and AVDD=3.3V.
LOPS3
0
1
( 1 )
PMLO3/RO3
( 2 )
0
1
0
1
≥ 3 0 0 m s
Table 75. Mono Line Output Mode Setting
Table 74. Mono Line Output Gain Setting
L3VL1-0
3H
2H
1H
0H
( 3 )
Normal Operation
Power-down
Power-save
Power-save
Mode
N o r m a l O u tp u t
Attenuation
- 97 -
+9dB
+6dB
+3dB
0dB
(default)
Pull-down to VSS1
Fall down to VSS1
Normal Operation
Rise up to VCOM
LOUT3 pin
( 4 )
( 5 )
≥ 3 0 0 m s
(default)
( 6 )
[AK4671]
2007/10

Related parts for ak4671