mt90502ag2 Zarlink Semiconductor, mt90502ag2 Datasheet - Page 106
mt90502ag2
Manufacturer Part Number
mt90502ag2
Description
Multi-channel Aal2 Sar
Manufacturer
Zarlink Semiconductor
Datasheet
1.MT90502AG2.pdf
(204 pages)
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RX SSRAM fixed structures are (with sizes in bytes for 128, 256, 512, and 1023 channels)
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RX SSRAM variable structures are
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TX SDRAM fixed structures are (with sizes in bytes for 128, 256, 512, and 1023 channels)
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TX SDRAM variable structures are
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RX SDRAM fixed structures are (with sizes in bytes for 128, 256, 512, and 1023 channels)
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There are no variable RX SDRAM structures.
1. All three LUTs can have the same base address. The sizes and base addresses of the LUTs are determined in registers 620h, 640h, and
660h.
AAL2 VC structures (16 K, 32 K, 64 K, 128 K)
CPS-Packet Descriptor Queue (8 K, 16 K, 32 K, 64 K)
CPS-Packet Disassembly structures (4 K, 8 K, 16 K, 32 K)
CPS-Packet Descriptor Queue Pointers (512, 1 K, 2 K, 4 K)
CPS-Packet Circular Buffers (1 for each channel, all the same size 256, 512, or 1 K bytes).
Data (AALO) cell FIFO (one FIFO: 4 K, 8 K, 16 K, 32 K, 64 K, or 128 K bytes)
Error Report structure FIFO (one FIFO: 4 K, 8 K, 16 K, 32 K, 64 K, or 128 K bytes)
CPU CPS-Packet buffer (one buffer: 16 K, 32 K, 64 K, or 128 K bytes)
CPS-Packet Descriptor Queue (512 K, 1 M, 2 M, 4 M)
Look-Up Tables
SDRAM Silent Buffers (32 buffers the same size, either 0, 16 K, 32 K, or 64 K bytes each)
RX CID table (1 K, 2 K, 4 K, 8 K)
1
(3 tables, each can have a size of 1 M, 2 M, 4 M, or 8 MB)
Zarlink Semiconductor Inc.
MT90502
106
Data Sheet
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