mt90502ag2 Zarlink Semiconductor, mt90502ag2 Datasheet - Page 179
mt90502ag2
Manufacturer Part Number
mt90502ag2
Description
Multi-channel Aal2 Sar
Manufacturer
Zarlink Semiconductor
Datasheet
1.MT90502AG2.pdf
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Address: 820h
Label: pointa_manage
Reset Value: 0000h
pointa_buffer_base_add
pointa_buffer_size
reserved
Address: 822h
Label: pointa_read
Reset Value: 0000h
pointa_rpnt
Reserved
Address: 824h
Label: pointa_write
Reset Value: 0000h
pointa_wpnt
Reserved
Address: 828h
Label: pointb_manage
Reset Value: 0000h
pointb_buffer_base_add
pointb_buffer_size
reserved
Label
Label
Label
Label
Bit Position Type
Bit Position Type
Table 194 - Point B Buffer Management Register
Bit Position Type
Table 191 - Point A Buffer Management Register
Bit Position Type
15:14
13:0
15:12
15:12
15:14
Table 193 - Point A Write Pointer Register
Table 192 - Point A Read Pointer Register
11:9
11:9
13:0
8:0
8:0
RO The chip's write pointer to the clock recovery point FIFO. This read
RO Reserved. Always read as “00”
RW Bits 20:12 of the base address of the clock recovery point buffer
RW “000” = 4KBytes, “001” = 8K, “010” = 16K, “011” = 32K, “100” =
RW Reserved. Must always be “0000”
RW Bits 20:12 of the base address of the clock recovery point buffer
RW “000” = 4KBytes, “001” = 8K, “010” = 16K, “011” = 32K, “100” =
RW Reserved. Must always be “0000”
RW The CUP’s read pointer to the clock recovery point FIFO. This
RW Reserved. Must always be “00”
Zarlink Semiconductor Inc.
pointer has an extra bit to allow for a full buffer (for example, 2048
points instead of 2047)
B in external SSRAM
64K, “101” = 128K, others = reserved
A in external SSRAM
64K, “101” = 128K, others = reserved. Size is for a single buffer.
read pointer has an extra bit to allow for a full buffer (for
example, 2048 points instead of 2047)
MT90502
179
Description
Description
Description
Description
Data Sheet
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