s71ws512ne0bfwzz Meet Spansion Inc., s71ws512ne0bfwzz Datasheet - Page 39

no-image

s71ws512ne0bfwzz

Manufacturer Part Number
s71ws512ne0bfwzz
Description
Stacked Multi-chip Product Mcp Flash Memoy And Psram Cmos 1.8 Volt, Simultaneous Operation, Burst Mode Flash Memory And Pseudo-static Ram
Manufacturer
Meet Spansion Inc.
Datasheet
June 28, 2004 S71WS512NE0BFWZZ_00_A1
Addresses
Addresses
2Ch
2Dh
3Ch
27h
28h
29h
2Ah
2Bh
2Eh
2Fh
30h
31h
32h
33h
34h
35h
36h
37h
38h
39h
3Ah
3Bh
40h
41h
42h
43h
44h
45h
46h
47h
48h
49h
4Ah
00FDh (WS256N)
00DFh (WS256N)
0019h (WS256N)
0001h
0000h
0005h
0000h
0003h
0003h
0000h
0080h
0000h
0000h
0000h
0002h
0003h
0000h
0080h
0000h
0000h
0000h
0000h
0000h
0050h
0052h
0049h
0031h
0034h
0010h
0002h
0001h
0000h
0008h
Data
Data
A d v a n c e
Table 11. Primary Vendor-Specific Extended Query
S29WSxxxN MirrorBit™ Flash Family For Multi-chip Products (MCP)
Table 10. Device Geometry Definition
I n f o r m a t i o n
Flash Device Interface description (refer to CFI publication 100)
0 = Not Supported, 1 = To Read Only, 2 = To Read & Write
0 = Not Supported, X = Number of sectors in per group
(refer to the CFI specification or CFI publication 100)
Number of Sectors in all banks except boot bank
Max. number of bytes in multi-byte write = 2
Silicon Technology (Bits 5-2) 0011 = 0.13 µm
Number of Erase Block Regions within device
00 = Not Supported, 01 = Supported
Address Sensitive Unlock (Bits 1-0)
Erase Block Region 1 Information
Erase Block Region 2 Information
Erase Block Region 3 Information
Erase Block Region 4 Information
Sector Protect/Unprotect scheme
08 = Advanced Sector Protection
Query-unique ASCII string “PRI”
0 = Required, 1 = Not Required
Major version number, ASCII
Minor version number, ASCII
Sector Temporary Unprotect
Simultaneous Operation
(00h = not supported)
Device Size = 2
Erase Suspend
Sector Protect
Description
Description
N
byte
N
39

Related parts for s71ws512ne0bfwzz