r8a66597 Renesas Electronics Corporation., r8a66597 Datasheet - Page 76
![no-image](/images/manufacturer_photos/0/5/561/renesas_electronics_corporation__sml.jpg)
r8a66597
Manufacturer Part Number
r8a66597
Description
Assp Usb2.0 2 Port Host/1 Port Peripheral Controller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R8A66597.pdf
(185 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
r8a66597BG
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Company:
Part Number:
r8a66597BG#DF1S
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
r8a66597FP
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Company:
Part Number:
r8a66597FPRF1S
Manufacturer:
CYPRESS
Quantity:
9 103
R8A66597FP/DFP/BG
2.15.3 Pipe disabled at the end of transfer bit (SHTNAK)
2.15.4 Transfer direction bit (DIR)
R e v 1 . 0 1
DIR bit is set to "1" it is transmission.
If the ISEL bit is set to "1" it is transmission.
This bit can be modified when "CSSTS=0", "PID=NAK", and when the pipe in the CURPIPE bit is not written to.
Execute USB communication using the selected pipe, use the software to continuously write "ACLRM=1" and
"ACLRM=0", clear the FIFO buffer assigned to the selected pipe, and then modify this bit in addition to the status of the
above three registers. To modify this bit after changing the PID bit of the corresponding pipe from "BUF" to "NAK",
check that "CSSTS=0" and "PBUSY=0", and modify the bit. However, when the controller has modified the PID bit to
"NAK", it is not necessary tto check the PBUSY bit.
(1) When a short packet data (including a zero-length packet) is received normally.
This bit is valid when DCP is receiving. When the software has set "1" to this bit for the receiving pipe, when the
transfer end, the controller modifies the PID bit of the DSP to "NAK". The controller determines transfer end when the
following conditions are fulfilled:
This bit can be modified when "CSSTS=0" and "PID=NAK". To modify this bit after changing the PID bit of the DCP
from "BUF" to "NAK", check that "CSSTS=0" and "PBUSY=0", and modify the bit. However, when the controller has
modified the PID bit to "NAK", it is not necessary to check the PBUSY bit.
Write "0" to this bit for the transmission direction pipe".
Set transfer direction of data stage and status stage of control when the Host Controller function is selected.
When the Peripheral Controller function is selected, write "0" to this bit.
When the Host Controller function is selected, if the DIR bit is set to "0" the transfer direction is reception and If the
When the Peripheral Controller function is selected, if the ISEL bit is set to "0" the transfer direction is reception and
O c t 1 7 , 2 0 0 8
assigned to the selected pipe0 and "BVAL=1".
p a g e 7 6 o f 1 8 3