tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 154
tmxf28155
Manufacturer Part Number
tmxf28155
Description
Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
Manufacturer
ETC-unknow
Datasheet
1.TMXF28155.pdf
(606 pages)
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155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
10 VT/TU Mapper Registers
10.1 VT/TU Mapper Register Descriptions
The following tables describe the functions of all bits in the register map. For each address, the register bits are
indicated as either read/write (R/W) or read only (RO), and the value of the bits on reset is given.
Table 167. VT_VERSION_R, VT Mapper Ready, Version, and Identification (RO)
Table 168. VT_GDELTA, VT Global Deltas (COR/COW)
154
Address
Address
0x20000
0x20001
14:11
10:8
15:3
7:0
Bit
Bit
15
2
1
0
VT_VERSION[2:0]
VT_H4LOMF_D
VT_ID[7:0]
VT_SD_D
VT_SF_D
VT_RDY
Name
Name
—
—
(continued)
Reserved.
VT/TU Signal Degrade Delta Bit. Logic 1 indicates a
change in the signal degrade condition based on the inter-
nal bit error rate detector.
VT/TU Signal Fail Delta Bit. Logic 1 indicates a change
in the signal fail condition based on the internal bit error
rate detector.
H4 Mismatch Delta Bit. Logic 1 indicates a change in the
H4 loss of multiframe condition.
VT/TU Mapper Ready. A 1 indicates that the VT/TU map-
per is ready for microprocessor reads and writes.
Reserved.
Block Version Number. These bits identify the version
number of the VT/TU mapper.
Block ID Number. VT_ID returns a fixed value (0x02)
when read.
Function
Function
Agere Systems Inc.
May 2001
Default
Default
Reset
0x000
Reset
0x1
0x1
0x1
0x02
0x0
0x0
NA
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